Locating high speed multiple objects using a SCAMP-5 vision-chip

Carey, Stephen J.; Barr, David R. W.; Wang, Bin; Lopich, Alexey; Dudek, Piotr

doi:10.1109/cnna.2012.6331468

Cited by 10 publications

(9 citation statements)

References 5 publications

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“…In this paper, we focus on the efficient execution of tracking model rather than the video pre-processing which can be completed by anterior camera circuits. In fact, previous work (Carey et al, 2012 ) reported ultra-fast speed 100,000 FPS for closed-shape detection on vision chip with analog-digital mixed signals. However, the application scenario is very different, so we don't include it into our comparison.…”

Section: Resultsmentioning

confidence: 99%

Fast Object Tracking on a Many-Core Neural Network Chip

Deng

Zou

et al. 2018

Front. Neurosci.

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Fast object tracking on embedded devices is of great importance for applications such as autonomous driving, unmanned aerial vehicle, and intelligent monitoring. Whereas, most of previous general solutions failed to reach this goal due to the facts that (i) high computational complexity and heterogeneous operation steps in the tracking models and (ii) parallelism-limited and bloated hardware platforms (e.g., CPU/GPU). Although previously proposed devices leverage neural dynamics and near-data processing for efficient tracking, their flexibility is limited due to the tight integration with vision sensor and the effectiveness on various video datasets is yet to be fully demonstrated. On the other side, recently the many-core architecture with massive parallelism and optimized memory locality is being widely applied to improve the performance for flexibly executing neural networks. This motivates us to adapt and map an object tracking model based on attractor neural networks with continuous and smooth attractor dynamics onto neural network chips for fast tracking. In order to make the model hardware friendly, we add local-connection restriction. We analyze the tracking accuracy and observe that the model achieves comparable results on typical video datasets. Then, we design a many-core neural network architecture with several computation and transformation operations to support the model. Moreover, by discretizing the continuous dynamics to the corresponding discrete counterpart, designing a slicing scheme for efficient topology mapping, and introducing a constant-restricted scaling chain rule for data quantization, we build a complete mapping framework to implement the tracking model on the many-core architecture. We fabricate a many-core neural network chip to evaluate the real execution performance. Results show that a single chip is able to accommodate the whole tracking model, and a fast tracking speed of nearly 800 FPS (frames per second) can be achieved. This work enables high-speed object tracking on embedded devices which normally have limited resources and energy.

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Section: Resultsmentioning

confidence: 99%

Fast Object Tracking on a Many-Core Neural Network Chip

Deng

Zou

et al. 2018

Front. Neurosci.

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“…To enhance the visualisation, the user can select a single sampling point at which an entire single frame is returned and thus can visually inspect if the frame contains an open or closed shape, and whether the waveform is in agreement. Since carrying out this work, we have demonstrated closed object detection at 100 kfps within a 256 9 256 array [6].…”

Section: Example Applicationmentioning

confidence: 99%

“…Applications requiring high speed operation have traditionally used ultra-high frame rate cameras [1,2] coupled to FPGA or PC hardware; while recently some non-conventional approaches [3] have been proposed, all these systems produce prodigious data rates. For such applications, vision chips can offer an alternative solution, that eliminates the sensory readout bottleneck [4][5][6]. For systems requiring very low power operation, the need to run an ADC merely to establish that there has been no change to the imaged scene, is a distinct disadvantage.…”

Section: Introductionmentioning

confidence: 99%

Mixed signal SIMD processor array vision chip for real-time image processing

Carey

Barr

Wang

et al. 2013

Analog Integr Circ Sig Process

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A prototype vision chip has been designed that incorporates a 20 9 64 array of processing elements on a 31 lm pitch. Each processor element includes 14 bits of digital memory in addition to seven analogue registers. Digital operands include NOR and NOT with operations of diffusion, subtraction, inversion and squaring available in the analogue domain. The cells of the array can be configured as an asynchronous propagation network allowing operations such as flood filling to occur with times of *1 ls across the array. Exploiting this feature allows the chip to recognise the difference between closed and open shapes at 30,000 frames per second. The chip is fabricated in 0.18 lm CMOS technology.

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“…For the Q-Eye chip which is used for the wire drawing application, the size of the cell is 33.6 µm and the size of the photo sensor is 7 µm, so the fill factor is about 4 % [14]. The increased size of the cell also affects the resolution which typically lies in the range of 128 x 128 to 256 x 256 cells [13][14][15][16][17][18]. Although there are also FPGA based implementations [19,20], this paper concentrates on CMOS implemented "focal-plane sensor-processor chips" because these systems overcome the bottleneck of data transfer in real-time image processing.…”

Section: Cellular Neural Network (Cnn)mentioning

confidence: 99%

“…High computational speed combined with short data access times promise high frame rates and short latency times. For simple algorithms like thresholding combined with binary operations, frame rates of up to 100 kHz for both, acquisition and image evaluation have been reported [17]. In combination with latency times in the range of 100 µs, CNN are in particular promising for closed-loop control of industrial processes [22,23].…”

Section: Cellular Neural Network (Cnn)mentioning

confidence: 99%

Inspecting rapidly moving surfaces for small defects using CNN cameras

Blug

Carl

Höfler

2013

Videometrics, Range Imaging, and Applications XII; And Automated Visual Inspection

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A continuous increase in production speed and manufacturing precision raises a demand for the automated detection of small image features on rapidly moving surfaces. An example are wire drawing processes where kilometers of cylindrical metal surfaces moving with 10 m/s have to be inspected for defects such as scratches, dents, grooves, or chatter marks with a lateral size of 100 µm in real time. Up to now, complex eddy current systems are used for quality control instead of line cameras, because the ratio between lateral feature size and surface speed is limited by the data transport between camera and computer. This bottleneck is avoided by cellular neural network (CNN) cameras which enable image processing directly on the camera chip. This article reports results achieved with a d emonstrator based on this novel analogue camera computer system. The results show that computational speed and accuracy of the analogue computer system are sufficient to detect and discriminate the different types of defects. Area images with 176 x 144 pixels are acquired and evaluated in real time with frame rates of 4 to 10 kHz depending on the number of defects to be detected. These frame rates correspond to equivalent line rates on line cameras between 360 and 880 kHz, a number far beyond the available features. Using the relation between lateral feature size and surface speed as a figure of merit, the CNN based system outperforms conventional image processing systems by an order of magnitude

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Locating high speed multiple objects using a SCAMP-5 vision-chip

Cited by 10 publications

References 5 publications

Fast Object Tracking on a Many-Core Neural Network Chip

Fast Object Tracking on a Many-Core Neural Network Chip

Mixed signal SIMD processor array vision chip for real-time image processing

Inspecting rapidly moving surfaces for small defects using CNN cameras

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