Logic optimization of unidirectional circuits with structural methods

Abstract

Self checking design based on unordered codesrequires that the target circuit is transformed into un unidirectional circuit. Techniques for the design of unidirectional circuits have been proposed. However, in general, niultilevel logic optimization techniques cannot be directly applied because they do not guaranty the unidirectional property is preserved. In this paper we will show how structural logic Optimization niethods can be successfully constrained for the optiniization of unidirectional circuits. Experiniental results show that the area overhead produced by making a circuit unidirectional can be largely reduced arid the circuits can be optimized to a snialler area than the original non-unidirectional benchniarks on average.

Low-power design technique with ambipolar double gate devices

“…Power consumption (P) depends on short-circuit current which, in turn, relies on V th according to a cubic correlation {I SC ∝ (β.τ in /12.V DD ). (V DD -2.V th ) 3 .f}. Since the DG-CNTFET threshold voltage is around 200mV lower than that of the 16nm CMOS technology, the difference in short-circuit current is high.…”

“…At the same time, the growing demand of ultralow power consumption and long battery lifetime in mobile platforms motivates a need to develop increasingly efficient power optimization techniques. This optimization operates at many levels, including the choice of technology and computer aided design (CAD) techniques for device sizing and interconnect [1] [2], circuit style and topology [3] [4], architecture and algorithms for circuit implementation. Although supply and threshold voltage scaling have proved to be an efficient means to lower dynamic power [5] [6], leakage (static) power has increased significantly due to higher sub-threshold leakage currents.…”

Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design

“…In addition, there is an increasing class of applications like portable electronics, micro sensors, radio frequency identification (RFID), and implantable biomedical devices, which demand ultra-low power consumption and prolonged battery lifetime. All of these concerns on power reduction motivated the designers to come up with power reduction methods such as supply voltage scaling [1,2], switching activity reduction [3,4], architectural techniques of pipelining and parallelism, computer aided design (CAD) techniques for device sizing and interconnect [5,6], logic optimization [7,8], etc. Among these techniques, the most successfully proven method is the supply voltage scaling, which significantly reduces both active and static components of power.…”

Interconnect Repeater Design for Portable Applications

“…Well known methods for the purpose include voltage scaling [10], [11], switching activity reduction [12], [13], and logic optimization [14], [15]. However, these methods are not suitable in many applications such as portable computing gadgets, medical electronics etc., where ultra-low power consumption at medium frequency of operation is the primary requirement.…”