2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors 2013
DOI: 10.1109/asap.2013.6567544
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Loop program mapping and compact code generation for programmable hardware accelerators

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Cited by 9 publications
(4 citation statements)
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“…Other researchers, Park and Choi [17], Mahlke et al [18], Kim and Mahapatra [19] and Teich et al [38] have also proposed solutions for code compression. However, their methods focus in different architectural aspects like the configuration mechanism and code and do not concern address generation schemes.…”
Section: Related Workmentioning
confidence: 97%
“…Other researchers, Park and Choi [17], Mahlke et al [18], Kim and Mahapatra [19] and Teich et al [38] have also proposed solutions for code compression. However, their methods focus in different architectural aspects like the configuration mechanism and code and do not concern address generation schemes.…”
Section: Related Workmentioning
confidence: 97%
“…By the restriction to get along with tiny instruction memories within each PE, the TCPA compiler generates code that is independent of the loop bounds as well as the size of the processor array 40 . Equation gives the size in bits of a VLIW code mapped onto a PE csVLIW=lVLIW·nVLIW, where l VLIW , the width of a VLIW instruction, depends mainly on the number of functional units that is defined at synthesis time, as well as memory and register bank sizes.…”
Section: Predictability Of Non‐functional Program Execution Propertiesmentioning
confidence: 99%
“…Equation gives the size in bits of a VLIW code mapped onto a PE csVLIW=lVLIW·nVLIW, where l VLIW , the width of a VLIW instruction, depends mainly on the number of functional units that is defined at synthesis time, as well as memory and register bank sizes. The number of instructions n VLIW of an invasive loop program is closely related to the parallelization and optimization techniques employed during the code generation (see the work of Boppu et al 40 )…”
Section: Predictability Of Non‐functional Program Execution Propertiesmentioning
confidence: 99%
“…For example, the tiling theory developed in [37], the code generation schemes of [21,16,7], the data movement and scratch-pad optimizations of [23,22,6,4,29,35] are not parametric. Recently, efficient code generation for parametric tiling [31,20] as well as some form of symbolic scheduling for tiled codes [8] have been developed.…”
Section: Introductionmentioning
confidence: 99%