Loopless Gray code enumeration and the Tower of Bucharest

Herter, Felix; Rote, Günter

doi:10.1016/j.tcs.2017.11.017

Cited by 6 publications

(5 citation statements)

References 14 publications

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“…Recently, Herter and Rote [HR18] devised loopless algorithms for generating b-ary Gray codes based on generalizations of the Tower of Hanoi puzzle. Flahive [Fla08] describes a construction of balanced b-ary Gray codes with transitions counts that differ by at most 2 from the average b n /n, improving upon the earlier paper by Flahive and Bose [FB07].…”

Section: Larger Alphabetsmentioning

confidence: 99%

Combinatorial Gray Codes — an Updated Survey

Mütze

2023

Electron. J. Combin.

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A combinatorial Gray code for a class of objects is a listing that contains each object from the class exactly once such that any two consecutive objects in the list differ only by a `small change'. Such listings are known for many different combinatorial objects, including bitstrings, combinations, permutations, partitions, triangulations, but also for objects defined with respect to a fixed graph, such as spanning trees, perfect matchings or vertex colorings. This survey provides a comprehensive picture of the state-of-the-art of the research on combinatorial Gray codes. In particular, it gives an update on Savage's influential survey [C. D. Savage. A survey of combinatorial Gray codes. SIAM Rev., 39(4):605--629, 1997.], incorporating many more recent developments. We also elaborate on the connections to closely related problems in graph theory, algebra, order theory, geometry and algorithms, which embeds this research area into a broader context. Lastly, we collect and propose a number of challenging research problems, thus stimulating new research endeavors.

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Section: Larger Alphabetsmentioning

confidence: 99%

Combinatorial Gray Codes — an Updated Survey

Mütze

2023

Electron. J. Combin.

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“…Figure illustrated the label of

Q_{4}^{3}

with faulty vertex in Gray code . For convenience, we only add the edge connection of vertex 0000, and the other vertices are connected in the same way as vertex 0000.…”

Section: Graph‐theoretic Formulationmentioning

confidence: 99%

Reconfigurable Fault‐tolerance mapping of ternary N‐cubes onto chips

Fan

Han

et al. 2020

Concurrency and Computation

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Network-on-chip (NoC) is a new design method of system-on-chip used in very large scale integrated circuit (VLSI) systems. It is an important issue for choosing the appropriate topology for NoC. Wirelength and layout area are significant parameters affecting NoC due to the restriction of chip area. In this paper, we propose a new interconnection network called the incomplete ternary n-cube for parallel computing systems. Then, a linear algorithm is proposed to layout incomplete ternary n-cube network onto torus NoC. Furthermore, the failure of interconnection network is also taken into account, and a fault-tolerant layout of incomplete ternary n-cube with faulty edges into torus NoC is verified. Theoretical analysis demonstrates that the proposed algorithm can reduce the network cost and wirelength, which be conducive to estimate the wire length and chip area. KEYWORDSfault tolerance, graph embedding, network-on-Chip, reconfigurable, wirelength INTRODUCTIONWith semiconductor technology entering the nanometer stage, it has become a reality for the integration of 100 billion transistors in a single chip. How to utilize a large number of transistors effectively is an important issue of the chip architecture. It has become very difficult to improve the overall performance of the system by improving the performance of the single processor core; the difficulty and complexity of chip design are also increasing. 1,2 Network-on-chip (NoC) has the advantages of high integration, low power consumption, low cost, and small volume, and it has become one of the mainstreams of very large scale integration (VLSI) system design. 3Network topology research is an important aspect of NoC. The network on chip uses the topological structure of computer network for reference. Ring-based and torus-based NoC architectures are illustrated in Figure 1 and Figure 2. Due to its own characteristics of NoC, such as a large number of available communication wire resources, a large amount of communication can be carried out between the cores, restricted by the area of the chip, and the layout of the regular network. 4,5 Therefore, NoC has certain special requirements for the topology structure.Due to the restriction of the chip area, the interconnection network and the total wire length become the crucial issues that affect the NoC communications. It is an auxiliary consideration for the cost of NoCs with respect to their interconnection networks.The more complex of networks, the higher in connectivity wiring and costs. Therefore, it is desirable to substitute a simple network for NoC with complex networks as an alternative. In such cases, one of the primary targets is improving network performance by providing better static topology features such as diameter and average distance between vertices. 6-8 Nevertheless, when designing network architecture, it is crucial to consider the influence of physical design constraints, for example wirelength, wiring congestion, and network cost. Li et al 9 studied that, in contrast to normal beliefs, NoCs suf...

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“…In Section 5.4, we discussed the possibility to generate minimal dominating sets D faster than in linear time per solution, by counting only the operations to insert or remove an element from D. A more ambitious goal would be to enumerate the solutions with constant delay. Such enumeration algorithms are called loopless or loop-free, see for example [Ehrlich 1973;Herter and Rote 2018;Knuth 2011]. The sequence in which the solutions are generated has to have the property that the difference between consecutive solutions is bounded in size by a constant.…”

Section: Loopless Enumeration and Gray Codesmentioning

confidence: 99%

Minimal Dominating Sets in a Tree: Counting, Enumeration, and Extremal Results

Rote

2019

Preprint

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A tree with n vertices has at most 95 n/13 minimal dominating sets. The growth constant λ = 13 √ 95 ≈ 1.4194908 is best possible. It is obtained in a semi-automatic way as a kind of "dominant eigenvalue" of a bilinear operation on sixtuples that is derived from the dynamic-programming recursion for computing the number of minimal dominating sets of a tree. We also derive an output-sensitive algorithm for listing all minimal dominating sets with linear set-up time and linear delay between successive solutions.

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Loopless Gray code enumeration and the Tower of Bucharest

Cited by 6 publications

References 14 publications

Combinatorial Gray Codes — an Updated Survey

Combinatorial Gray Codes — an Updated Survey

Reconfigurable Fault‐tolerance mapping of ternary N‐cubes onto chips

Minimal Dominating Sets in a Tree: Counting, Enumeration, and Extremal Results

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