Low-Bit Quantization Methods for Modulated Wideband Converter Compressed Sensing

Abstract

This paper studies the impacts of low-bit quantization to wideband signal reconstruction with a sub-Nyquist sampling scheme Modulated Wideband Converter (MWC). Several real types of analog-to-digital converters (ADCs) are firstly simulated to the MWC and their results on wideband signal reconstruction are compared based on the low-bit criterion of the ADCs. Assessing the wideband reconstruction performances, this study proposes a trade-off between the oversampling factor, the number of bits and the type of quantizer, which can achieve the performance of reconstruction as close as possible to the ideal reconstruction.

Full-Duplex Efficient Channel Codes for Residual Self-Interference/Quantization Noise Cancellation

“…Difference quantizer device architectures such as Σ∆, Gaussian with mid-rise, pipeline and SAR are applied in the ADC process at the receiver side. Low-bit ADC quantizers with oversampling method are also considered for low cost, low power consumption and simple hardware devices, which are the characteristics of green communications and IoT applications [31]. The simulation parameters are sum up in Table I.…”

“…9. Indeed, the Σ∆ is seemed to give a best result because the larger value of over-sampling factor, i.e, m over = 4 will give the better achievement in Σ∆ quantizer when compared with other ADC quantizer devices architectures, which has been proved in [31].…”

“…4, the I and Q components that are received from the channel will pass through different types of ADC such as Σ∆, Gaussian with mid-rise, pipeline as well as SAR with the bit resolution B ADC and the dynamic voltage range V ADC in order to obtain the discrete time form. The oversampling method with oversampling factor m over is also applied in order to reduce the effects of quantization noise in low bit quantization ADC [31]. After that, these components will be mixed again to form the symbols with double complex number.…”

Joint Semi-Blind Self-Interference Cancellation and Equalisation Processes in 5G QC-LDPC-Encoded Short-Packet Full-Duplex Transmissions

“…Then, the received summation signal is passed to the Analogue-to-Digital Converter (ADC) process to be converted to the discrete time domain signal, . Here, in order to overcome the effects of residual quantisation noise error, the bit resolution and voltage dynamic range of Digital-to-Analogue Converter (DAC)/ADC devices should be chosen carefully and highly enough, which was implemented in [ 35 ], or the oversampling method should be applied if a low-bit resolution of ADC devices is used [ 36 ]. In this paper, we further assumed that the impacts of DAC/ADC, other hardware impairments on the SI cancellation, and the problem of the synchronisation process were not considered (which is outside of the scope of this study, but essential in practice).…”