Low Contact Resistivity with Low Silicide/p⁺-Silicon Schottky Barrier for High-Performance p-Channel Metal–Oxide–Silicon Field Effect Transistors

Abstract

High pressures of hydrogen up to 3.0 GPa and temperatures up to 373 K were used as a pretreatment to introduce structural changes in the bulk and on the surface of Cu-Zr amorphous alloys which then were examined by means of x-ray diffraction and microscopy. The hydrogenative pretreatment of high hydrogen fugacity followed by annealing at 623 K, aimed at causing desorption of hydrogen, and an eventual exposure of the samples to air at room temperature to oxidize Zr, resulted in a distinct increase of catalytic activity in the dehydrogenation of 2-propanol. A tentative mechanism to account for the enhancement of the catalytic activity induced by the above combined pretreatment is discussed.

Importance of Si surface flatness to realize high-performance Si devices utilizing ultrathin films with new material system

“…YSi 2 , ErSi 2 , YbSi 2 , Pd 2 Si, PtSi etc.) [8,9,10,11,12,13]. The dopant segregation process at the silicide/Si interface is also useful to reduce the contact resistivity [14,15].…”

Pr3Si6N11/Si3N4 Stacked High-k Gate Dielectrics with High Quality Ultrathin Si3N4 Interfacial Layers

“…In order to obtain very high current drivability of transistors, the intrinsic transconductance must be increased as high as possible and simultaneously the series resistance of the source and drain electrode of transistors must be decreased as small as possible. The series resistance of transistors can be decreased as small as possible only in the silicon due to the existence of silicide materials having very low barrier height such as 0.3 eV to 0.35 eV and very large electron and hole concentration in the n + and the p + region up to 2x10 20 cm -3 resulting in realization of very small contact resistance between the metal electrode and the n + /p + region such as 7~8x10 -10 Ω·cm 2 (4,5). On the other hand, the series resistance of transistors cannot be decreased in the compound semiconductor and Ge due to the existence of very high barrier height between the metal electrode and the compound semiconductor and Ge resulting in very large contact resistance such as 10 -6 Ω·cm 2 for the compound semiconductor and 7x10 -7 Ω·cm 2 for Ge (6) .Very high speed LSI can be realized only by the silicon but not by the compound semiconductor and Ge.…”

Effect of Composition Rate on Erbium Silicide Work Function on Different Silicon Surface Orientation

“…The low R c due to low SBH is obtained using erbium silicide (ErSi x ) for n + silicon and palladium silicide (Pd 2 Si) for p + silicon on Si(100) (11,13,14).…”