Low Cost FPGA Devices in High Speed Implementations of Keccak-f Hash Algorithm

Abstract

Abstract. Cryptographic hash functions are important components in many applications of contemporary information systems like computation of digital signatures, authentication codes or fingerprinting. The recent SHA-3 competition announced by NIST resulted in developments of new hash methods from which the Keccak algorithm has been selected as the winner after intensive public evaluation of the candidates. In this paper we are discussing various high-speed organizations of the Keccak-f[1600] permutation function -the core component of the Keccak SHA-3 algorithm -which can be created from the basic iterative architecture by round replication (loop unrolling) and pipelining. Different variants of the proposed architectures are implemented in a popular Spartan-3 device form Xilinx and the presented results identify main problems which arise if a high speed architecture of the function is automatically implemented in an FPGA device.

A comparative study of hash algorithms with the prospect of developing a CAN bus authentication technique

“…As described in [5,6], the FPGA Spartan-3 is a hardware platform that allows the considered hash algorithms to be run, highlighting major performance parameters from which a substantial advantage for the Keccak algorithm can be seen.…”

“…The algorithms of interest are run on an ARM Cortex A9-based platform, ranked according to their performances and compared to those obtained by means of an FPGA circuit as described in [5,6].…”

“…The proposed study provides a more comprehensive and up-to-date comparison of hash algorithms by implementing the SHA-3 finalists, as well as other newer common hashing functions, such as Blake2, Shake, Kangaroo Twelve and Blake3 on ARM cortex-A9 also taking their speed performance on an FPGA platform into consideration [5,6]. As a result, the best algorithm is determined and the validity of the speed is verified.…”

Comparison of power consumption in pipelined implementations of the BLAKE3 cipher in FPGA devices

“…1. A detailed analysis of the proposed implementation of the algorithm on the FPGA platform is described in [12], but it is worth noting one difference: since in BLAKE the message words m remain active as input parameters to the G modules in all rounds, it is necessary to store and distribute them through a separate, 512-bit path running parallel to the state (compare Fig. 1), while in the KECCAK the message bits are loaded only as the initial value of the state before the first round, after which their storage and distribution to the transformation logic are not needed.…”