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Abstract. Cryptographic hash functions are important components in many applications of contemporary information systems like computation of digital signatures, authentication codes or fingerprinting. The recent SHA-3 competition announced by NIST resulted in developments of new hash methods from which the Keccak algorithm has been selected as the winner after intensive public evaluation of the candidates. In this paper we are discussing various high-speed organizations of the Keccak-f[1600] permutation function -the core component of the Keccak SHA-3 algorithm -which can be created from the basic iterative architecture by round replication (loop unrolling) and pipelining. Different variants of the proposed architectures are implemented in a popular Spartan-3 device form Xilinx and the presented results identify main problems which arise if a high speed architecture of the function is automatically implemented in an FPGA device.

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