Low-Crosstalk Simultaneous 16-Channel × 25 Gb/s Operation of High-Density Silicon Photonics Optical Transceiver

Aoki, Tsuyoshi; Sekiguchi, Satoshi; Simoyama, T.; Tanaka, Shinsuke; Nishizawa, Motoyuki; Hatori, Nobuaki; Sobu, Yohei; Sugama, Atsushi; Akiyama, T.; Hayakawa, A.; Muranaka, Hidenobu; Mori, Toshihiko; Chen, Yanfei; Jeong, Seok–Hwan; Tao, Yu; Morito, Ken

doi:10.1109/jlt.2018.2797167

Cited by 29 publications

(6 citation statements)

References 6 publications

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“…8. [74] In 2021, Columbia University presented a compact, 3Dintegrated CMOS silicon photonic transceiver for DWDM interconnects. The transceiver interleaves 64 parallel wavelength channels enabling the energy efficient scaling of multi-Tbps/mm 2 bandwidth density for future co-packaged chipsets.…”

Section: The 3d Integrationmentioning

confidence: 99%

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Li 李,

Zhang 张

et al. 2024

Chinese Phys. B

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The performance of optical interconnection has improved dramatically in recent years. Silicon-based optoelectronic heterogeneous integration is the key enabler to achieve high performance optical interconnection, which not only provides the optical gain which is absent from native Si substrates and enables complete photonic functionalities on chip, but also improves the system performance through advanced heterogeneous integrated packaging. This paper reviews recent progress of silicon-based optoelectronic heterogeneous integration in high performance optical interconnection. The research status, development trend and application of ultra-low loss optical waveguides, high-speed detectors, high-speed modulators, lasers and 2D, 2.5D, 3D and monolithic integration are focused on.

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Section: The 3d Integrationmentioning

confidence: 99%

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Li 李,

Zhang 张

et al. 2024

Chinese Phys. B

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“…Therefore, co-packaging is very suitable as an intermediate step before full integration (Figure 1e) may be achieved. More details regarding the extensive work that has recently been carried out on researching the co-integrated optical I/O may be found in the literature [2,[7][8][9][10].…”

Section: System Architecturementioning

confidence: 99%

Co-Package Technology Platform for Low-Power and Low-Cost Data Centers

Papatryfonos

Selviah

Maman³

et al. 2021

Applied Sciences

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We report recent advances in photonic–electronic integration developed in the European research project L3MATRIX. The aim of the project was to demonstrate the basic building blocks of a co-packaged optical system. Two-dimensional silicon photonics arrays with 64 modulators were fabricated. Novel modulation schemes based on slow light modulation were developed to assist in achieving an efficient performance of the module. Integration of DFB laser sources within each cell in the matrix was demonstrated as well using wafer bonding between the InP and SOI wafers. Improved semiconductor quantum dot MBE growth, characterization and gain stack designs were developed. Packaging of these 2D photonic arrays in a chiplet configuration was demonstrated using a vertical integration approach in which the optical interconnect matrix was flip-chip assembled on top of a CMOS mimic chip with 2D vertical fiber coupling. The optical chiplet was further assembled on a substrate to facilitate integration with the multi-chip module of the co-packaged system with a switch surrounded by several such optical chiplets. We summarize the features of the L3MATRIX co-package technology platform and its holistic toolbox of technologies to address the next generation of computing challenges.

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“…Silicon photonics stands out as a highly promising technological platform for the development of photonic integrated circuits (PICs) characterized by high bandwidth and low energy consumption. Considering silicon-based PICs [8][9][10][11][12][13][14][15], together with several photonic components such as laser diodes, optical modulators, and photodetectors, optical waveguide type demultiplexers (DeMUXs) such as microring resonators [16][17][18][19], delayed interferometers (DIs) [20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36], or arrayed waveguide gratings (AWGs) [37][38][39][40][41][42][43][44][45][46][47][48] are normally needed to filter the WDM optical signals spatially out to each photodetector to be decoded.…”

Section: Introductionmentioning

confidence: 99%

Silicon-Nanowire-Based 100-GHz-Spaced 16λ DWDM, 800-GHz-Spaced 8λ LR-8, and 20-nm-Spaced 4λ CWDM Optical Demultiplexers for High-Density Interconnects in Datacenters

Jeong

2024

Photonics

Self Cite

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Several types of silicon-nanowire-based optical demultiplexers (DeMUXs) for use in short-reach targeted datacenter applications were proposed and their spectral responses were experimentally verified. First, a novel 100-GHz-spaced 16λ polarization-diversified optical DeMUX consisting of 2λ delayed interferometer (DI) type interleaver and 8λ arrayed waveguide gratings will be discussed in the spectral regimes of C-band, together with experimental characterizations showing static and dynamic spectral properties. Second, a novel 800-GHz-spaced 8λ optical DeMUX was targeted for use in LR (long reach) 400 Gbps Ethernet applications. Based on multiple cascade-connected DIs, by integrating the extra band elimination cutting area, discontinuous filtering response was analytically identified with a flat-topped spectral window and a low spectral noise of <−20 dB within an entire LR-8 operating wavelength range. Finally, a 20-nm-spaced 4λ coarse wavelength division multiplexing (CWDM)-targeted optical DeMUX based on polarization diversity was experimentally verified. The measurement results showed a low excessive loss of 1.0 dB and a polarization-dependent loss of 1.0 dB, prominently reducing spectral noises from neighboring channels by less than −15 dB. Moreover, TM-mode elimination filters were theoretically analyzed and experimentally confirmed to minimize unwanted TM-mode-oriented polarization noises that were generated from the polarization-handling device. The TM-mode elimination filters functioned to reduce polarization noises to much lower than −20 dB across the entire CWDM operating window.

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Low-Crosstalk Simultaneous 16-Channel × 25 Gb/s Operation of High-Density Silicon Photonics Optical Transceiver

Cited by 29 publications

References 6 publications

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Co-Package Technology Platform for Low-Power and Low-Cost Data Centers

Silicon-Nanowire-Based 100-GHz-Spaced 16λ DWDM, 800-GHz-Spaced 8λ LR-8, and 20-nm-Spaced 4λ CWDM Optical Demultiplexers for High-Density Interconnects in Datacenters

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