Low power analog neurosynapse chips for a 3-D "sugarcube" neuroprocessor

Duong, Tuan A.; Kemeny, Sabrina E.; Tran, Mua D.; Daud, T.; Thakoor, A. P.; Ludwig, David E.; Saunders, Chris; Carson, John C.

doi:10.1109/icnn.1994.374451

Cited by 11 publications

(2 citation statements)

References 5 publications

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“…One of the common beyond Moore's law era technologies to improve performance in communication that is being utilized across a variety of computing platforms (including traditional von Neumann computer systems) is three-dimensional (3D) integration. 3D integration has been utilized in neuromorphic systems even from the early days of neuromorphic, especially for pattern recognition and object recognition tasks [2383], [2384]. In more recent applications, 3D integration has been used in a similar way as it would be for von Neumann architectures, where memory is stacked with processing [1058].…”

Section: A Communicationmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

175

180

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Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture. This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems. The promise of the technology is to create a brainlike ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities. In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history. We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications. We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled. The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed.

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Section: A Communicationmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

175

180

View full text Add to dashboard Cite

show abstract

“…Different methods such as wafer-scale integration, 131,173 multi-chip modules 99,179,185 and die stacking 56,164 have been proposed. The die stacking approach for instance, uses several neural networks integrated circuit planes stacked vertically in a unique circuit.…”

Section: Architecturementioning

confidence: 99%

Neural Networks in Analog Hardware — Design and Implementation Issues

Drăghici

2000

Int. J. Neur. Syst.

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This paper presents a brief review of some analog hardware implementations of neural networks. Several criteria for the classification of general neural networks implementations are discussed and a taxonomy induced by these criteria is presented. The paper also discusses some characteristics of analog implementations as well as some trade-offs and issues identified in the work reviewed. Parameters such as precision, chip area, power consumption, speed and noise susceptibility are discussed in the context of neural implementations. A unified review of various "VLSI friendly" algorithms is also presented. The paper concludes with some conclusions drawn from the analysis of the implementations presented.

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Modular neuro-chip with on-chip learning and adjustable learning parameters

Cho

1996

Neural Process Lett

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Low power analog neurosynapse chips for a 3-D "sugarcube" neuroprocessor

Cited by 11 publications

References 5 publications

A Survey of Neuromorphic Computing and Neural Networks in Hardware

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Neural Networks in Analog Hardware — Design and Implementation Issues

Modular neuro-chip with on-chip learning and adjustable learning parameters

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