Low power dissipation MOS ternary logic family

Balla, P.; Antoniou, A.

doi:10.1109/jssc.1984.1052216

Cited by 170 publications

(76 citation statements)

References 11 publications

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“…The output of this ternary inverter is defined by a equation. In a ternary inverter, if i is the input and three outputs are a, b and c, then they can be obtained from these three equations [16], [17] which are given below: table given in TABLE 1 and TABLE 2 [14], [16], [17].…”

Section: Ternary Not Gate/invertermentioning

confidence: 99%

Analytical Distinction Between Cntfet Based And Mosfet Based Srams And Logic Gates

Nandy¹,

Dutta²,

Mahmood³

2015

ELELIJ

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In this review, we compare the distinct properties of Carbon Nanotube Field Effect Transistor (CNTFET) based applications with MOSFET based applications in memory and digital electronics technology. In nanoelectronics circuitry, CNTFET has opened new dimensions with extreme opportunities of improvement in circuit performance due to its extreme mobility, ballistic conduction and so forth. Apart from being an excellent conductor, CNTFET can also be used as a memory unit for its good stability in storing a data bit and as digital circuits (multi-valued logic gates) for its better PDP and sensitivity. This paper discusses the design and read-write mechanisms of 6T and 8T CNTFET SRAM cell and a comparative study among themselves based on their corresponding advantages and disadvantages. Moreover, superiority of CNTFET SRAM over MOSFET SRAM is analyzed in terms of

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Section: Ternary Not Gate/invertermentioning

confidence: 99%

Analytical Distinction Between Cntfet Based And Mosfet Based Srams And Logic Gates

Nandy¹,

Dutta²,

Mahmood³

2015

ELELIJ

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“…Ternary logic (or three-valued logic) has attracted considerable interest due to its potential advantages over binary logic for designing digital systems. For example, it is possible for ternary logic to achieve simplicity and energy efficiency in digital design since the logic reduces the complexity of interconnects and chip area [19]. Furthermore, serial and serial-parallel arithmetic operations can be carried out faster if the ternary logic is employed.…”

Section: Ternary Logic Gate Design Using Cntfetmentioning

confidence: 99%

“…Furthermore, serial and serial-parallel arithmetic operations can be carried out faster if the ternary logic is employed. Extensive research on design and implementation of ternary logic using CMOS can be found in the technical literature [19,20]. Chip area and power dissipation can be reduced by more than 50% using an efficient MVL implementation for a signed 32-bits multiplier compared to its fastest binary counterpart [11].…”

Section: Ternary Logic Gate Design Using Cntfetmentioning

confidence: 99%

Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor

Kim¹

2011

Transactions on Electrical and Electronic Materials

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As complementary metal-oxide semiconductor (CMOS) continues to scale down deeper into the nanoscale, various device non-idealities cause the I-V characteristics to be substantially different from well-tempered metal-oxide semiconductor field-effect transistors (MOSFETs). The last few years witnessed a dramatic increase in nanotechnology research, especially the nanoelectronics. These technologies vary in their maturity. Carbon nanotubes (CNTs) are at the forefront of these new materials because of the unique mechanical and electronic properties. CNTFET is the most promising technology to extend or complement traditional silicon technology due to three reasons: first, the operation principle and the device structure are similar to CMOS devices and it is possible to reuse the established CMOS design infrastructure. Second, it is also possible to reuse CMOS fabrication process. And the most important reason is that CNTFET has the best experimentally demonstrated device current carrying ability to date. This paper discusses and reviewsthe feasibility of the CNTFET's application at this point of time in integrated circuits design by investigating different types of circuit blocks considering the advantages that the CNTFETs offer.

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“…Multiple Valued logic (MVL) such as Ternary logic is considered over binary logic due to its considerable advantages such as reduced interconnects, chip area [3], faster serial, serial-parallel arithmetic operations. MVL logic enhances the performance of CMOS technology in the logic design [6].…”

Section: Introductionmentioning

confidence: 99%

Performance Evaluation of CNTFET Based Ternary Basic Gates and Half Adder

2015

IJSR

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Abstract:The shrinkage in size of VLSI chips as well as improved energy efficiency is the need of the modern digital era. Using ternary logic instead of conventional binary logic helps to reduce circuit complexity and hence reduces chip area. Carbon nanotubes FET (CNTFET) are preferred over CMOS for logic design due to its high performance i.e. excellent transport property, low resistivity and higher current on-off ratio. The performance of ternary based logic gates is evaluated in terms of parameter such as power dissipation and delay.

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Low power dissipation MOS ternary logic family

Cited by 170 publications

References 11 publications

Analytical Distinction Between Cntfet Based And Mosfet Based Srams And Logic Gates

Analytical Distinction Between Cntfet Based And Mosfet Based Srams And Logic Gates

Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor

Performance Evaluation of CNTFET Based Ternary Basic Gates and Half Adder

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