Low power probabilistic online monitoring of systematic erroneous behaviour

Gutierrez, Mauricio D.; Tenentes, Vasileios; Kázmierski, Tom J.; Rossi, Daniele

doi:10.1109/ets.2017.7968239

Cited by 1 publication

(3 citation statements)

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“…The workload size S is determined once the online signal probabilities have converged. The signature window bounds W min , W max may be set to M sp ± 3σ for a 0.3% probability of having a false alarm [7]. However, the signature window can be narrower, which produces a higher error coverage but increases the probability of having false alarms.…”

Section: Proposed Low Cost Error Monitoringmentioning

confidence: 99%

“…Signal probability monitors Signal probability monitors (SPMs) were recently introduced as a low cost error monitoring technique of the online signal probabilities [7]. Figure 2 presents the concept of online signal probabilities.…”

Section: Motivationmentioning

confidence: 99%

“…Therefore, using error detection mechanisms such as D&C results expensive for such applications. Signal Probability Monitors (SPMs) have been recently proposed as a low cost error detection technique of SEB for applications where errors can be tolerated [7]. These monitors measure deviations of the online signal probabilities at the outputs of circuits and are capable of detecting when SEB has occurred.…”

Section: Introductionmentioning

confidence: 99%

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Low cost error monitoring for improved maintainability of IoT applications

Gutierrez

Tenentes

Kázmierski

et al. 2017

2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

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Abstract-Electronic systems with power-constrained embedded devices are used for a variety of IoT applications, such as geomonitoring, parking sensors and surveillance. Such applications may tolerate few errors. However, with the increasing occurrence of faults in-the-field, devices that exhibit systematic erroneous behaviour must be eventually identified and replaced. In this paper, we propose a novel low cost error monitoring technique to assist the maintainability planning of low power IoT applications by ranking devices based on the systematic erroneous behaviour they exhibit. Small on-chip monitors are used to collect the signal probability information at the outputs of each device which is then transmitted to the system software via the communications channel of the system to rank them accordingly. To evaluate the error monitoring capabilities of the proposed technique, we injected multiple bit-flips and stuck-at faults on a set of the EPFL and the ISCAS benchmarks. Results demonstrate an average error coverage of 84.4% and 73.1% of errors induced by bit-flips and stuck-at faults, respectively, with an average area cost of 1.52%. A maintainability planning simulation shows that the proposed technique achieves a reduction of 26x to 263x in area cost and static power, and consumes over 625x less power for communications when compared against duplication and comparison.

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Section: Proposed Low Cost Error Monitoringmentioning

confidence: 99%

Section: Motivationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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