Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems

Energy-efficient HOG-based object detection at 1080HD 60 fps with multi-scale support

“…In addition to consuming power in the hundreds of Watts (e.g., Nvidia 8800 GTX GPU consumes 185W [8]), which is not suitable for embedded applications, they often cannot reach high definition (HD) resolutions. Implementation in [2] achieves high throughput on a GPU at 100 fps using the approach presented in [4] to speed up feature extraction, but with a resolution of 640×480 pixels.…”

An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler

“…In the field of object recognition, visual attention algorithms have been adopted to achieve high-throughput performance and low power consumption. [8][9][10] They divide the input image into hundreds of rectangular image tiles and selects the regions of interest among them to avoid processing background clutters in the input image. This approach successfully reduces the processing workload and also contributes to the high recognition accuracy by eliminating background image tiles without object keypoints.…”

“…Previous approaches considered only speedup improved by the instruction-, data-, and task-level parallelism using figures of merit such as gigaoperations per second (GOPS). [8][9][10] In the case of recent vision processors employing the task-level pipeline, however, we must also consider NoC efficiency because multiple pairs of producer-consumer cores compete for data transaction, which results in NoC congestion. Because NoC congestion degrades the task-level pipeline's throughput, we must consider the NoC speedup of data transactions between the multiple producer-consumer cores.…”

“…At first, researchers proposed a heterogeneous cluster with a hierarchical star topology to reduce network energy consumption with minimum hops. 8,9 A task producer and consumers coexist in one cluster, but the number of produced tasks varies from 0 to more than 10. Therefore, there is workload unbalance between consumers, resulting in low core utilization.…”

“…Each link on Figure 4. Core organization and network-on-a-chip (NoC) topology: a heterogeneous cluster with hierarchical star NoC, [8][9] homogeneous cluster with hierarchical star NoC, 10 and homogeneous cluster with 2D-mesh NoC (this work).…”