Low power units for the Viterbi decoder

This paper proposes an improved SOVA for turbo code decoding, and it targets the decoded state error. According to the simulation results, for 5 iterations, the Itr performance of modification with decoding depth = 12 is better than that of conventional decoder with (5 = 20. For siso Inter-SISO the size and power consumption of SMU and TBU, the Ykl Decoder 1 leaver L2 (k Deco L2 (k) reduction ration can be about 20%. With 2-3 iterations, the Yk performance of modification is equivalent to that of 1 1, (k) conventional decoder with 5 iterations. For 8 = 20 , the Figure 1. Turbo decoder structure reduction ration of reliability values store operations and interleaving/deinterleaving is about 28% and 40%, SOFT OUTPUT VITERBI ALGORITHM respectively.

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A Viterbi decoder core with no trace-back unit

Shebaita

Khairy²,

Salama³

et al. 2003

Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)

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Low power units for the Viterbi decoder

Cited by 5 publications

References 3 publications

Performance improvement of Viterbi and Sova decoding Algorithms with finite decoding length

Performance improvement of Viterbi and Sova decoding Algorithms with finite decoding length

An improved SOVA for Turbo Code Decoding

A Viterbi decoder core with no trace-back unit

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