Low Temperature Implementation of Dopant-Segregated Band-edge Metallic S/D junctions in Thin-Body SOI p-MOSFETs

Abstract

band-edge silicide, such as PtSi, provides an additional leverage to further reduces the contact resistivity by This paper proposes the implementation of a dopant promoting thermionic injection. Depending on the process segregated band-edge silicide using implantation-to-silicide sequence, dopant-segregation (DS) technique can be and low temperature activation (500°C). The integration of implemented in three different flavours [5]: i) implantation platinum silicide coupled to boron segregation demonstrates a into Si followed by metal deposition and silicidation 5000 enhancement of the current drive over the dopant-free annealing, ii) implantation-through-metal (ITM) followed by approach. RF characterization unveils a cut-off frequency fT dopant segregation induced by the silicidation thermal budget of 180 GHz at Lg 30 nm without application of channel and finally, iii) implantation-through-silicide (ITS) followed stressors.by dopant pile-up initiated by a low temperature 1-Introduction post-silicidation activation step.Over the last decade, the development of metallic ITM ITS source/drain (S/D) has emerged as a potential performance booster because of the increasing impact of S/D resistance on transistor performance, especially in the case of ultra-thin 11B2 2 501 and multiple-gate thin body MOSFETs. Although, promising results have been reported for p-MOSFETs using platinum silicide (PtSi) [1], the gain in S/D sheet resistance has been overwhelmed by the contact resistance at the RTAsili A pon source/channel interface due to a Schottky barrier (SB) in activation activation excess of 0. 1eV [2]. Dopant segregation (DS) at the silicide/silicon interface proves to efficiently modulate the Schottky barrier height while avoiding issues associated to doped junctions. So far, the so-called dopant segregation Fig. 1: Schematic illustration of the ITM and ITS schemes for the technique has been implemented along with midgap silicides, implementation of metallic low Schottky barrier S/D in UTB S01 MOSFETs. e.g. NiSi [3], CoSi2 [4] but involved dopant implantation and high temperature activation before the silicidation step. In The advantage associated to the two last techniques (Fig. 1) is contrast, this work explores the implementation of DS to confine dopants in the silicide or the metal layer without characterized by the three distinctive features: i) the generation of defects, thus enhancing the segregation implant-to-silicide (ITS), ii) band-edge low Schottky barrier effect governed by solid solubility and diffusion mechanisms. to holes (PtSi) and iii) thermal budget limited to 500°C. For As the silicidation reaction proceeds, the formation of the the first time, p-type thin-film SOI MOSFETs that integrate silicide alloy naturally involves a profound re-arrangement of S/D junctions with the above characteristics are demonstrated. bonds between Pt and Si. During this phase of material Beyond DC characterizations, RF performance is reported for reconstruction, it is speculated that boron can be incorporated a physical g...

Silicon‐Based Devices and Materials for Nanoscale CMOS and Beyond‐CMOS

“…The efficiency of dopant-segregated Schottky contacts has been demonstrated. 9,10 It has been shown that a sub-100 meV barrier can be obtained consistently with the boron pile-up observed at the PtSi/Si interface. A new stateof-the-art current drive performance has been established for Schottky barrier MOSFETs at L G = 25 nm: 7 0N = 530 μΑ/μπι at K G = F D = -1.1 V. Figure 4 demonstrates that metallic S/D is competitive with the best unstrained SOI pMOS technologies.…”

“…/ 0 N VS. / 0 FF in state-of-the art of S/D pMOS on SOI indicating that boron dopant-segregated devices lead both Schottky barrier and conventional unstrained thin-film SOI technologies 9. …”

New Semiconductor Devices

“…A new state-of-the-art current drive performance has been established for SB-MOSFETs at 25 nm of gate length: Figure 14 also demonstrates that metallic S/D competes with best unstrained channel SOI p-FET technologies. A record RF performance for a 30 nm p-type unstrained thin-film fully depleted SOI SB MOSFET has been demonstrated with a f T of 180 GHz [16]. The effect of strained semiconductor is also thoroughly studied: carrier injection from a metallic junction should benefit from band splitting and from the corresponding Schottky barrier height reduction.…”

“…The expected benefit is to considerably reduce the specific contact resistance of the metal/semiconductor junction while keeping activated dopants sharply localized at the interface. In the framework of the European projects, the efficiency of dopant segregated Schottky contacts has been demonstrated [16][17][18]. The implementation of dopant segregated contact is illustrated by considering the following three distinctive features: (i) implant-to-silicide (ITS), (ii) band-edge low Schottky barrier (SB) to holes (PtSi) and (iii) thermal budget limited to 500…”

Formation of steep, low Schottky-barrier contacts by dopant segregation during nickel silicidation

“…11,12 Recently, short-channel p-type SB-FETs with NiSi and PtSi contacts and boron dopant segregation have been demonstrated that show oncurrents comparable to conventional unstrained SOI FETs. 13,14 Traditionally, an Ohmic contact between a semiconductor and a metal is formed by highly doping the semiconductor. 15 However, for a fully depleted SOI MOSFET channel doping causes merely a shift of the threshold voltage and reduced carrier mobility.…”