Low-temperature multichip-to-wafer 3D integration based on via-last TSV with OER-TEOS-CVD and microbump bonding without solder extrusion

Kumahara, Kousei; Liang, Rui; Lee, Sungho; Miwa, Yohei; Murugesan, M.; Kino, Hisashi; Fukushima, Takafumi; Tanaka, Tetsu

doi:10.1109/ectc32862.2020.00192

Cited by 5 publications

(3 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Typically, the glue layers of dicing tapes are not thermally stable. Therefore, room-temperature OER-SiO2-CVD is employed to enhance the interconnect yield with the good quality of SiO2 [12]. Addi-tional compressive force after chip placement eliminates a small gap between the photosensitive resin and tilted µLEDs, preventing the generation of Cu bridges connecting the p-and n-type Au electrodes.…”

Section: Resultsmentioning

confidence: 99%

“…The µLEDs were attached to a dicing tape in a face-down fashion. First, the sidewalls of the µLEDs singulated by laser cutting were insulated with a 100-nm-thick SiO2 deposited by room-temperature OER-SiO2-CVD (Meiden Nanoprocess Innovation) [12] with tetraethoxysilane at the dicing-tape level. Since such blue tapes were composed of a glue layer and base film, the GaN layer was partially covered with the glue with a thickness of 10 μm.…”

Section: Fabricationmentioning

confidence: 99%

See 1 more Smart Citation

Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

Susumago

Liu

Hoshi

et al. 2023

IEEE Electron Device Lett.

View full text Add to dashboard Cite

This letter describes a direct Cu bonding technology to there-dimensionally integrate heterogeneous dielets based on a chip-on-wafer configuration. 100-μm-cubed blue μLEDs temporarily adhered on a photosensitive resin are interconnected by semi-additive plating (SAP) without thermal compression bonding. By using SAP bonding, a lot of dielets can be stacked on thin 3D-IC chiplets. The following three key technologies are applied to solve the yield issues of SAP bonding. After pick-and-place assembly, additional coplanarity enhancement eliminates Cu bridges grown to a small gap between the μLEDs and photosensitive resin. The μLEDs arrays with sidewalls insulated by room-temperature ozone-ethylene-radical (OER)-SiO2-CVD are successfully bonded on sapphire wafers and a thin 3D-IC with through-Si via (TSV). Further design optimization is required, but partial seed pre-etching works well to increase the yield. Fully integrated module implementation with the 3D-ICs will be the next stage, however, we discuss a superior prospect for yield enhancement toward nearly 100%.

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Fabricationmentioning

confidence: 99%

Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

Susumago

Liu

Hoshi

et al. 2023

IEEE Electron Device Lett.

View full text Add to dashboard Cite

show abstract

“…The common features for almost TSV integration processes are as follows: 4,5) silicon wafer etching by a deep reactive ion etching (RIE), the deposition of an insulator liner on sidewalls customarily by the chemical vapor deposition (CVD) method, and the formation of a conductive layer which generally consists of the deposition of diffusion barrier metal and copper seed layer, and via filling though copper electroplating. Nowadays, these TSV key films are depending on plasmaenhanced CVD (PECVD), [6][7][8][9][10] physical vapor deposition (PVD), 11) atomic layer deposition (ALD) [12][13][14][15] and plasmaenhanced ALD (PEALD) [16][17][18] system. Those deposition methods are not able to answer the actual TSV needs.…”

Section: Introductionmentioning

confidence: 99%

Effects of amplitude modulated capacitively coupled discharge Ar plasma on kinetic energy and angular distribution function of ions impinging on electrodes: particle-in-cell/Monte Carlo collision model simulation

Abe

Kamataki

Yamamoto

et al. 2022

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

We investigated effects of amplitude modulated (AM) capacitively coupled Ar discharge plasma on the ion energy distribution function (IEDF) and the ion angular distribution function (IADF) incident on electrodes using the particle-in-cell/Monte Carlo collision model. For AM discharge, the electron density and electron temperature and the kinetic energy and angle of ions incident on the ground electrode change periodically with AM frequency, whereas ones for continues wave discharge are almost constant. For AM discharge, the plasma had hysteresis characteristics. The variation width of the peak energy of IEDF and the full width at half maximum (FWHM) of IADF increase with the AM level. These effects of AM method discharge are more noticeable at lower pressures. Thus, the AM discharge offers a way to control simultaneously IEDF and IADF, which opens a new avenue of plasma processes such an ALD-like PECVD.

show abstract

3D IC Integration and 3D IC Packaging

Lau

2021

Semiconductor Advanced Packaging

View full text Add to dashboard Cite

Low-temperature multichip-to-wafer 3D integration based on via-last TSV with OER-TEOS-CVD and microbump bonding without solder extrusion

Cited by 5 publications

References 18 publications

Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED

Effects of amplitude modulated capacitively coupled discharge Ar plasma on kinetic energy and angular distribution function of ions impinging on electrodes: particle-in-cell/Monte Carlo collision model simulation

3D IC Integration and 3D IC Packaging

Contact Info

Product

Resources

About