Low-temperature passivation of copper by doping with Al or Mg

Lanford, W. A.; Ding, Peng; Wang, W.; Hymes, S.; Muraka, S.P.

doi:10.1016/0040-6090(95)05837-0

Cited by 101 publications

(50 citation statements)

References 19 publications

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“…[376][377][378][379][380][381][382][383] Numerous different types of dopants elements beyond Si have been reported for Cu with Sn, Al, Mg, and Mn being perhaps the most popular. In this method, the improvements in electromigration are believed to be due to the dopant atom segregating from the bulk Cu and diffusing to the Cu/DB interface and helping passivate the Cu surface and/or improving the adhesion strength between Cu and the DB.…”

Section: Current Status Of Low-k Db/ccl/es Materials and R And Dmentioning

confidence: 99%

“…Many of the reported methods involve either doping the Cu lines with a few percent of select alloying elements, [376][377][378][379][380][381][382] or selectively forming an additional surface passivation layer material between the DB and Cu. [383][384][385][386][387][388][389][390][391][392][393] In most cases, these methods involve additional processing steps separate from the DB deposition process.…”

Section: Current Status Of Low-k Db/ccl/es Materials and R And Dmentioning

confidence: 99%

See 1 more Smart Citation

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

King

2014

ECS J. Solid State Sci. Technol.

133

115

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Over the past decade, the primary focus for improving the performance of nano-electronic metal interconnect structures has been to reduce the impact of resistance-capacitance (RC) delays via utilizing insulating dielectrics with ever lower values of dielectric permittivity. The integration and implementation of such low dielectric constant (i.e. low-k) materials has been fraught with numerous challenges. For intermetal and interlayer (ILD) low-k dielectrics, these challenges have been largely associated to integration with metal interconnect fabrication processes and well documented and reviewed in the literature. Although equally important, less attention has been given to other low-k dielectrics utilized in metal interconnect structures that are commonly referred to as low-k dielectric barriers (DB), etch stops (ES), and/or Cu capping layers (CCL). These materials present numerous challenges as well for integration into metal interconnect fabrication processes. However, they also have more stringent integrated functionality requirements relative to low-k ILD materials that serve only a basic purpose of electrically isolating adjacent metal lines. In this article, we review the integration challenges and associated integrated functionality requirements for low-k DB/ES/CCL materials with a focus on the current status and future direction needed for these materials to facilitate both Moore's law (i.e. More Moore) and More than Moore scaling.

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Section: Current Status Of Low-k Db/ccl/es Materials and R And Dmentioning

confidence: 99%

Section: Current Status Of Low-k Db/ccl/es Materials and R And Dmentioning

confidence: 99%

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

King

2014

ECS J. Solid State Sci. Technol.

133

115

View full text Add to dashboard Cite

show abstract

“…In the previous research, we were success in CIAS single phase formation by PLD and selenization with thin film composition 1.2-0.8 of Cu/IIIA or 17-23% of Cu/[CIAS] [14]. By this research, we would continue the previous research to find the critical condition in the composition of Cu-deficient of CIAS at the least Cu composition of previous CIAS thin film.…”

Section: Introductionmentioning

confidence: 56%

“…The 112 plane of films 1 and 2 were identified by JCPDS no. 01-089-5648 and 00-040-1487 belonged to CIS at 26.777° and 26.579°, where the CIS standards were used to identify the CIAS [14], [24,25]. The CIAS 2θ lies between CIS and CAS 2θ and shifts according to the Al amount in the CIAS.…”

Section: Structurementioning

confidence: 99%

Critical Condition in CuInAlSe2 Growth of Solar Cell Absorber

et al. 2016

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“…The oxidation resistance, morphology, and thermal stability contributed by addition of small amounts of Al into bulk copper were well studied in the 1990 s. [11][12][13][14] According to the Al-Cu phase diagram, there is no Cu-Al binary phase when the Cu content is greater than $85%. 15 A low concentration of Al is completely soluble in Cu.…”

Section: Introductionmentioning

confidence: 99%

Self-forming Al oxide barrier for nanoscale Cu interconnects created by hybrid atomic layer deposition of Cu–Al alloy

Park

Han

Kang

et al. 2013

Journal of Vacuum Science &Amp; Technology A: Vacuum, Surfaces, and Films

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The authors synthesized a Cu–Al alloy by employing alternating atomic layer deposition (ALD) surface reactions using Cu and Al precursors, respectively. By alternating between these two ALD surface chemistries, the authors fabricated ALD Cu–Al alloy. Cu was deposited using bis(1-dimethylamino-2-methyl-2-butoxy) copper as a precursor and H2 plasma, while Al was deposited using trimethylaluminum as the precursor and H2 plasma. The Al atomic percent in the Cu–Al alloy films varied from 0 to 15.6 at. %. Transmission electron microscopy revealed that a uniform Al-based interlayer self-formed at the interface after annealing. To evaluate the barrier properties of the Al-based interlayer and adhesion between the Cu–Al alloy film and SiO2 dielectric, thermal stability and peel-off adhesion tests were performed, respectively. The Al-based interlayer showed similar thermal stability and adhesion to the reference Mn-based interlayer. Our results indicate that Cu–Al alloys formed by alternating ALD are suitable seed layer materials for Cu interconnects.

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Low-temperature passivation of copper by doping with Al or Mg

Cited by 101 publications

References 19 publications

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

Critical Condition in CuInAlSe2 Growth of Solar Cell Absorber

Self-forming Al oxide barrier for nanoscale Cu interconnects created by hybrid atomic layer deposition of Cu–Al alloy

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