Low-temperature, short-time, wafer-level bonding for Cu/Sn/Cu solid-state-diffusion interconnect in 3-D integration

Abstract

In this paper, Cu/Sn/Cu solid-state diffusion (SSD) under low temperature is proposed and investigated for three-dimensional (3-D) integration. Cu and Sn films were deposited by high-efficiency and low-cost physical vapor deposition to fabricate 40-µm-pitch daisy-chain structures. Subsequently, the Cu bump surface was treated with Ar (5% H2) plasma. The Cu/Sn/Cu structure was bonded face to face at 200 ℃ for 15 min. The interfacial composition of the as-bonded dies comprised five layers, Cu/Cu3Sn/Cu6Sn5/Cu3Sn/Cu, with no Sn remaining and no overflow. After annealing at 200 ℃ for 15 min under N2 atmosphere, as the Cu6Sn5 completely transformed into Cu3Sn, the microstructure changed to stable three layers: Cu/Cu3Sn/Cu. Additionally, the average bonding shear strength reached 27.0 MPa, which is higher than that for conventional Cu/Sn SSD bonding. The measured bonding resistance value was maintained at the theoretical value. Moreover, the parabolic growth constant of Cu3Sn reached 1.86×10−15 m2/s. Our study demonstrates the feasibility of using Cu/Sn/Cu SSD for low-temperature, short-time, wafer-level bonding.

Solid-phase transient soldering method based on Au/Ni–W multilayer thin-film-modified copper-based structures

“…Moreover, high temperature conditions will accelerate the diffusion of atoms at the solder interface, forming Kirkendall holes and threatening device reliability [ [28] , [29] , [30] ]. Cu–Sn low-temperature solid-state soldering has been considered as a potential solution to the above problems, where the soldering temperature ranges from 150 °C to 220 °C [ 31 , 32 ]. Wang [ 33 ] et al investigated a low-temperature soldering technique using graphene as an interlayer.…”