Low-Voltage and High-Speed Voltage-Controlled Ring Oscillator with Wide Tuning Range in 0.18 µm Complementary Metal Oxide Semiconductor

Tiao, Yu-Sheng; Sheu, Meng-Lieh; Tsao, Lin-Jie

doi:10.1143/jjap.50.04de11

Cited by 5 publications

(3 citation statements)

References 10 publications

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“…Compared to [ 15 ], this ring-VCO has better phase noise and high value of FOM at the expense of modest power. Its power consumption is significantly lower than [ 12 – 14 , 16 ]; and finally, its wide tuning range is notable than other reported works except that of [ 13 ].…”

Section: Results and Comparisonsmentioning

confidence: 83%

Designing a Ring-VCO for RFID Transponders in 0.18 μm CMOS Process

Jalil

Reaz

Bhuiyan

et al. 2014

The Scientific World Journal

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In radio frequency identification (RFID) systems, performance degradation of phase locked loops (PLLs) mainly occurs due to high phase noise of voltage-controlled oscillators (VCOs). This paper proposes a low power, low phase noise ring-VCO developed for 2.42 GHz operated active RFID transponders compatible with IEEE 802.11 b/g, Bluetooth, and Zigbee protocols. For ease of integration and implementation of the module in tiny die area, a novel pseudodifferential delay cell based 3-stage ring oscillator has been introduced to fabricate the ring-VCO. In CMOS technology, 0.18 μm process is adopted for designing the circuit with 1.5 V power supply. The postlayout simulated results show that the proposed oscillator works in the tuning range of 0.5–2.54 GHz and dissipates 2.47 mW of power. It exhibits a phase noise of −126.62 dBc/Hz at 25 MHz offset from 2.42 GHz carrier frequency.

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Section: Results and Comparisonsmentioning

confidence: 83%

Designing a Ring-VCO for RFID Transponders in 0.18 μm CMOS Process

Jalil

Reaz

Bhuiyan

et al. 2014

The Scientific World Journal

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“…Latched inverters are applied across all differential nodes to satisfy the oscillation condition. 24,25) Figure 3 shows the proposed delaycell of ILFM. The pMOS resistive loads are used for tuning the output oscillation frequency.…”

Section: Proposed Injection Locked Frequency Multipliermentioning

confidence: 99%

Fractionally Injection-Locked Frequency Multiplication Technique with Multi-Phase Ring Voltage-Controlled Oscillator

Ikeda

Lee

Kamimura

et al. 2013

Jpn. J. Appl. Phys.

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In this paper, we present a fractionally injection-locked frequency multiplication technique that can solve the tradeoff between the selectable frequency step and phase noise of injection-locked frequency multipliers (ILFMs). For a given output frequency step, the phase noise of the proposed ILFM is lower than that of conventional ILFMs because higher-frequency signals can be injected. The proposed ILFM was fabricated using a 180 nm Si complementary metal oxide semiconductor (CMOS) process. 1/2-, 1/3-, 1/4-, and 1/6-integral frequency multiplications were realized, which means that the output frequency resolution is 6 times as high as that of conventional ILFM. When the reference frequency was 100 MHz, the measured phase noise at 725 (= 100×29/4) MHz was -120 dBc/Hz at a 1 MHz offset, and that at 767 (= 100×23/3) MHz was -119 dBc/Hz at 1 MHz offset.

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“…The delay cell is equipped with an inverter latch that generates delay by positive feedback in order to satisfy the oscillation condition. 20,21) The pMOS resistive loads are used for tuning the output oscillation frequency. In the commonly used delay cells with pMOS resistive loads, the range of control voltages with reasonable sensitivity is limited from 0 V to the pMOS threshold voltage.…”

Section: Detailed Circuit Designsmentioning

confidence: 99%

1.2–17.6 GHz Ring-Oscillator-Based Phase-Locked Loop with Injection Locking in 65 nm Complementary Metal Oxide Semiconductor

Lee¹,

Ito²,

Amakawa³

et al. 2012

Jpn. J. Appl. Phys.

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A wide-frequency-range phase-locked loop (PLL) with subharmonic injection locking is proposed. The PLL is equipped with a wide tunable ring-type voltage-controlled oscillator (ring VCO), frequency dividers, and a doubler in order to the widen injection-locked tuning range (ILTR). In addition, high-frequency injection signals are used to improve phase noise, which is supposed to be generated by a reference PLL. The proposed circuit is fabricated by using a 65 nm Si complementary metal oxide semiconductor (CMOS) process. The measured frequency tuning range is from 1.2 to 17.6 GHz with a frequency doubler and dividers. The phase noise at 14.4 GHz (=32×450 MHz) with injection locking was -109 dBc/Hz, which shows a 21-dB reduction compared with that in the case without injection locking.

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Low-Voltage and High-Speed Voltage-Controlled Ring Oscillator with Wide Tuning Range in 0.18 µm Complementary Metal Oxide Semiconductor

Cited by 5 publications

References 10 publications

Designing a Ring-VCO for RFID Transponders in 0.18 μm CMOS Process

Designing a Ring-VCO for RFID Transponders in 0.18 μm CMOS Process

Fractionally Injection-Locked Frequency Multiplication Technique with Multi-Phase Ring Voltage-Controlled Oscillator

1.2–17.6 GHz Ring-Oscillator-Based Phase-Locked Loop with Injection Locking in 65 nm Complementary Metal Oxide Semiconductor

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