Low-voltage Low-power CMOS Programmable Gain Amplifier

Calvo, B.; Sanz, M.T.; Celma, S.

doi:10.1109/iccdcs.2006.250844

Cited by 11 publications

(4 citation statements)

References 13 publications

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“…16 The source-degenerated amplifier with gm-boosting technique (Figure 3A,B) is presented to improve the linearity of open loop structures with less power consumption. 17,18 By using negative feedback, the impedance seen from the source of the input transistor is reduced. Therefore, the gate-source voltage of the input transistor experiences smaller variation for different input voltages, which makes the equivalent transconductance to be a weak function of the transconductance of the input transistor.…”

Section: Introductionmentioning

confidence: 99%

“…The source‐degenerated amplifier with gm‐boosting technique (Figure 3A,B) is presented to improve the linearity of open loop structures with less power consumption 17,18 . By using negative feedback, the impedance seen from the source of the input transistor is reduced.…”

Section: Introductionmentioning

confidence: 99%

“…Programmable gain amplifier (PGA) with degeneration resistors utilizing gm‐boosting technique: (A) Calvo et al 17 ; (B) Rahmatian and Mirabbasi 18 …”

Section: Introductionmentioning

confidence: 99%

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A low power CMOS programmable gain amplifier employing positive feedback technique

Firouz

Aghdam

Jafarnejad

2022

Circuit Theory & Apps

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This paper presents a low power CMOS programmable gain amplifier (PGA) utilizing a novel gm‐boosting technique to increase the maximum achievable DC gain. The structure increases the effective transconductance of the circuit without any additional elements. The gain enhancement is accomplished without increasing the power consumption. The variable gain function is achieved by varying the effective transconductance of the circuit and its output resistance. The proposed PGA achieves a wide gain range of 47.5 dB from 2.1 to 49.6 dB with a constant bandwidth. According to the post‐layout simulation results of the proposed circuit in 0.18‐μm TSMC CMOS process the bandwidth and the input referred noise voltage at the maximum gain are 11.3 MHz and 10.76 nV/sqrt (Hz), respectively. The second and third harmonic distortions of the proposed PGA at the minimum gain are less than −72.4 and −40.7 dB, respectively. The core circuit of proposed PGA draws only 164 μA from a 1.2‐V supply voltage occupying an area of 29 μm * 26 μm.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A low power CMOS programmable gain amplifier employing positive feedback technique

Firouz

Aghdam

Jafarnejad

2022

Circuit Theory & Apps

View full text Add to dashboard Cite

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“…A PGA based on a simple differential gain amplifier with a negative feedback G m boosted source-degeneration differential pair is presented in Ref. [2]. Many AGC circuits and novel architectures have been proposed in recent years.…”

Section: Introductionmentioning

confidence: 99%

A differential automatic gain control circuit with two-stage −10 to 50 dB tuning range VGAs

Wang

Mao

Xiao³

et al. 2013

J. Semicond.

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A differential automatic gain control (AGC) circuit is presented. The AGC architecture contains twostage variable gain amplifiers (VGAs) which are implemented with a Gilbert cell, a peak detector (PD), a low pass filter, an operational amplifier, and two voltage to current (V -I ) convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-m single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit (containing output buffers and a band-gap reference) consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 s to stabilize the output. The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.

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