A low power CMOS programmable gain amplifier employing positive feedback technique

Firouz, Samira; Aghdam, Esmaeil Najafi; Jafarnejad, Roya

doi:10.1002/cta.3288

Cited by 7 publications

(2 citation statements)

References 23 publications

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“…[1][2][3][4][5][6][7][8][9] Numerous circuits like current conveyors, 10 voltage-controlled oscillators, 11 linear regulators, 12,13 switchedcapacitor circuit, 14 low-dropout regulator 15 and liquid crystal display drivers, [16][17][18] micro-electromechanical system sensors, 19 multipliers 20 use OTA for implementing their functionality. Indeed, important circuits like programmable gain amplifiers, 21,22 variable gain amplifiers, 21 filters, [23][24][25] modulators, 26,27 and transimpedance amplifiers 28,29 use OTAs to form systems on chip. In such systems, OTA is expected to improve current utilization and reduce power consumption, noise and voltage requirements.…”

Section: Introductionmentioning

confidence: 99%

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Sharma,

Kumar,

Madan

et al. 2024

Int J Numerical Modelling

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Low‐noise and low‐voltage operation is prime requirement of an operational transconductance amplifier for low frequency applications. However, achieving low‐noise operation at low supply voltages is a challenging task in CMOS technology owing to noise‐power and noise‐stability tradeoffs. This article outlines, the design of four differential bias self‐cascode (DBSC) operational transconductance amplifiers (OTAs) working at ±0.7 V. The four design techniques namely gate driven (GD), bulk driven (BD), bulk driven quasi‐floating gate (BDQFG), and gate driven quasi floating bulk (GDQFB) have been applied on DBSC OTAs. The designing aspects and performance parameters of these four OTAs such as gain, gain‐bandwidth, input referred noise (IRN), settling time (ST), common mode rejection ratio (CMRR), total harmonic distortion, input impedance, transconductance, power consumption, area consumption and process/mismatch variations have been fairly compared in this work. These DBSC OTAs have been designed and simulated using a standard 0.18‐μm 6M1P CMOS N‐well process. The results infer GD DBSC OTA shows high CMRR of 125.83 dB. While the BD DBSC OTA consumes very low power of 0.2 μW. The BDQFG DBSC OTA shows low 1% ST of 24.83 μS. The GDQFB DBSC OTA show high transconductance (2.35 mS), high gain (64.97 dB), and low IRN (0.40 μV/√Hz at 10 Hz). The theoretical predictions for these OTAs agree with the post‐layout simulations. The proposed OTAs can be used for designing various analog circuits such as programmable gain amplifiers, variable gain amplifiers, and transimpedance amplifiers for low‐frequency biomedical and health care applications.

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Section: Introductionmentioning

confidence: 99%

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Sharma,

Kumar,

Madan

et al. 2024

Int J Numerical Modelling

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“…However, open-loop PGAs suffer a lot from PVT variations. Additionally, the latest research about the PGA has been mainly focused on its applications in wireless communication systems [ 11 , 12 , 13 , 14 , 15 ]. Wide bandwidth and wide gain tuning range are usually required for PGAs utilized in these systems, while the linearity may be limited.…”

Section: Introductionmentioning

confidence: 99%

Linearity Enhancement Techniques for PGA Design

Wang

Wan

et al. 2023

Micromachines

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This paper presents some techniques to improve the linearity of traditional resistive feedback PGAs. By utilizing the switched op-amp in the PGA, the MOS switches in the feedback resistor array can be eliminated and thus the PGA’s linearity can be improved. The PGA’s linearity is further improved with an additional capacitor, which is used for pre-charging the sampling capacitor to strengthen its capability to drive the sampling capacitor without any extra power consumption. The pre-charge technique is especially suitable for the case where the PGA drives a large sampling capacitance. Implemented in SMIC 0.18 um CMOS technology, the proposed PGA can achieve a gain of 0.5 or 1 and consumes 4.68 mW at a single 5 V supply with the switched output stage enabled. When driving a 20 pF sampling capacitor at a sampling frequency of 200 kHz, the simulation results show that the proposed PGA can give a 9 dBc improvement in SFDR of the sampled signal compared to the traditional PGA design and the SFDR can reach up to 114 dBc.

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Half‐bridge secondary series resonant converter control for full voltage range

Kong,

Sun,

et al. 2024

Circuit Theory & Apps

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SummaryThis paper proposes a full‐range regulation method for half‐bridge secondary series resonant converter. With the proposed method, the resonant converter can achieve full‐range regulation within a narrow frequency range regardless of the load level. Besides, the converter can be used for the battery charger systems and programmable power supply systems. The primary‐side transistors and the secondary‐side diodes are zero‐voltage switching turned on and zero‐current switching turned off, respectively. In‐depth analysis reveals the characteristics, that is, operation principle, voltage conversion ratio, component stresses, and ZVS condition of the half‐bridge secondary series resonant converter with the proposed method. Besides, the performance comparisons among the different methods are conducted to present the merits of the proposed method. Further, the performance comparisons between the half‐bridge secondary series resonant converter and primary series resonant converter with the proposed method are executed to show their superiority with different turns ratio range of the transformer, respectively. When the turns ratio is larger than 0.5 and smaller than 1, the performance of the half‐bridge primary series resonant converter is better; when the turns ratio is equal to 1, the two configurations feature the same performance; while when the turns ratio is larger than 1, the half‐bridge secondary series resonant converter is preferable. The experimental results validate the theoretical analysis.

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A low power CMOS programmable gain amplifier employing positive feedback technique

Cited by 7 publications

References 23 publications

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Design of low‐voltage low‐noise operational transconductance amplifiers for low frequency applications

Linearity Enhancement Techniques for PGA Design

Half‐bridge secondary series resonant converter control for full voltage range

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