2013
DOI: 10.1007/s00034-013-9567-6
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Low-voltage reduced complexity cells for MOS translinear loops

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Cited by 6 publications
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“…This approach suffers from noise associated with switching. In references [4][5][6][7], MOSFETs in saturation region are used to design some computational circuit. In [8], a floating-gate MOS transistors are used to implement a four quadrant multiplier.…”
Section: Introductionmentioning
confidence: 99%
“…This approach suffers from noise associated with switching. In references [4][5][6][7], MOSFETs in saturation region are used to design some computational circuit. In [8], a floating-gate MOS transistors are used to implement a four quadrant multiplier.…”
Section: Introductionmentioning
confidence: 99%