2005
DOI: 10.1088/0268-1242/20/8/003
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Low voltage stress-induced leakage current in 1.4–2.1 nm SiON and HfSiON gate dielectric layers

Abstract: This work examines stress-induced leakage current (SILC) in both ultrathin silicon oxynitride and hafnium silicate dielectric layers for future MOS technology nodes. SILC is confirmed to be sense voltage dependent and is observed to have a dependence on bulk oxide traps for both dielectric layers. A possible explanation for the sense voltage dependence is provided. SILC is found to be a greater problem in the HfSiON layers, because of its magnitude relative to the initial current. This results in the leakage c… Show more

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Cited by 18 publications
(7 citation statements)
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“…Such a low conduction band offset would mean that any benefit of using a physically thicker high-k layer may be outweighed by the increased tunnel current caused by the low barrier to electron transport. This confirms recent electrical characterisation studies of these dielectric layers, which have shown that leakage currents can be a major limiting factor in their performance [27].…”
Section: Discussionsupporting
confidence: 89%
“…Such a low conduction band offset would mean that any benefit of using a physically thicker high-k layer may be outweighed by the increased tunnel current caused by the low barrier to electron transport. This confirms recent electrical characterisation studies of these dielectric layers, which have shown that leakage currents can be a major limiting factor in their performance [27].…”
Section: Discussionsupporting
confidence: 89%
“…According equation (11) these variations are oposite in sign to the charge variation. As it has been suggested elsewhere [40] at flat-band voltage conditions there are not electrons or holes directly injected form the gate or semiconductor, i.e., free charges move by hopping from trap to trap. Moreover, since no optical neither electrical external stimulus are applied, free charges must be originated from trapping or detrapping mechanisms of defects existing inside the dielectric and the energy needed to activate this mechanisms only can be provided as thermal energy, that is, phonons.…”
Section: Flat-band Transient Technique (Fbt)mentioning
confidence: 85%
“…As it has been suggested elsewhere [3] at flat-band voltage conditions there are not electrons or holes directly injected form the gate or semiconductor, i.e., free charges move by hopping from trap to trap. In particular, charging or discharging mechanisms of traps and defects inside the dielectric yield flat-band voltage time transients.…”
Section: Flat-band Voltage Transientsmentioning
confidence: 85%