Proceedings of the 1999 International Symposium on Low Power Electronics and Design - ISLPED '99 1999
DOI: 10.1145/313817.313891
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Lower and upper bounds on the switching activity in scheduled data flow graphs

Abstract: Kruse@OFFIS.Uni-Oldenburg.DE 1. ABSTRACT In this paper we present an approach to calculate lower and upper bounds for the switching activity in scheduled data flow graphs. The technique can be used to prune the design space in high level synthesis for low power before allocation and binding of functional units and registers. The low power allocation and binding problem is formulated. It is shown that this problem can be relaxed to the bipartite weighted matching problem which is solvable in O(n3) where n is th… Show more

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Cited by 9 publications
(5 citation statements)
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“…Lower and upper bound estimation procedures are given for scheduled DFGs without resource constraints. This paper extends the work of [10] by improving the bounds if the number of resources is constrained. Some researchers have addressed HLS for low power problems that are closely related to our work.…”
Section: Previous Workmentioning
confidence: 78%
See 4 more Smart Citations
“…Lower and upper bound estimation procedures are given for scheduled DFGs without resource constraints. This paper extends the work of [10] by improving the bounds if the number of resources is constrained. Some researchers have addressed HLS for low power problems that are closely related to our work.…”
Section: Previous Workmentioning
confidence: 78%
“…In [9] a technique is described that estimates a lower bound on the performance of schedules from a DFG with resource constraints. To the best of our knowledge, LBE techniques for low power at the higher levels of abstraction are first addressed in [10]. Lower and upper bound estimation procedures are given for scheduled DFGs without resource constraints.…”
Section: Previous Workmentioning
confidence: 99%
See 3 more Smart Citations