Multi-channel electrical recordings of neural activity in the brain is an increasingly powerful method revealing new aspects of neural communication, computation, and prosthetics. However, while planar silicon-based CMOS devices in conventional electronics scale rapidly, neural interface devices have not kept pace. Here, we present a new strategy to interface silicon-based chips with three-dimensional microwire arrays, providing the link between rapidly-developing electronics and high density neural interfaces. The system consists of a bundle of microwires mated to large-scale microelectrode arrays, such as camera chips. This system has excellent recording performance, demonstrated via single unit and local-field potential recordings in isolated retina and in the motor cortex or striatum of awake moving mice. The modular design enables a variety of microwire types and sizes to be integrated with different types of pixel arrays, connecting the rapid progress of commercial multiplexing, digitisation and data acquisition hardware together with a three-dimensional neural interface. Figure 2: Microwire bundle fabrication. a, Fabrication procedure of microwire bundles. (i) Individual microwires are electrically insulated with a robust ceramic or polymeric coating. (ii) A sacrificial layer of parylene-C (PaC) is coated onto the wires to provide spacing. (iii) If desired, the tips of the microwires can be polished to an angular tip, or electrosharpened. (iv) The wires are then bundled together, either by spooling the wire, or mechanical aggregation. The wires naturally pack in a honeycomb array. (v)The bundle is infiltrated with biomedical epoxy to hold the wires together, then the top (proximal) end polished for mating to the CMOS chip. (vi) The proximal end is etched 10-20 µm to mate to the CMOS chip and the distal end of the wires is released by etching with oxygen plasma, allowing each wire to penetrate individually. A threaded collet is added to hold the bundle. b, A backscatter SEM of an individual microwire with a PtIr conductive core and 45 µm PaC coating (a, ii). c, The wires pack into a honeycomb structure, and epoxy is infiltrated in between to fill the gaps (a, v). d, The proximal end of a bundle of 177 20 µm Au wires with 100 µm spacing after etching to expose the conductive wire. e, The predicted volumetric displacement of bundles of microwires as a function of wire-to-wire distance, determined by the wire size and sacrificial coating thickness (t). This assumes a perfect hexagonal packing fraction of ~90.69%. For 15 µm wires with 100 µm spacing, the volume displaced is 2%. f, The distal end of a bundle of 600 7.5µm W wires coated with 1 µm of glass after etching to remove the PaC and embedded epoxy. g,h, The distal end (PtW 20 µm wires, 100 µm spacing) can be shaped with single wire precision to simultaneously access different depths in the tissue.