Machine Learning Techniques for Modeling and Performance Analysis of Interconnects

Abstract

Interconnects are essential components of any electronic system. Their design, modeling and optimization are becoming complex and computationally expensive with the evolution of semiconductor technology as the devices of nanometer dimensions are being used. In high-speed applications, system level simulations are needed to ensure the robustness of a system in terms of signal and power quality. The simulations are becoming very expensive because of the large dimensional systems and their full-wave models. Machine learning techniques can be used as computationally efficient alternatives in the design cycle of the interconnects. This paper presents a review of the applications of machine learning techniques for design, optimization and analysis of interconnects in high-speed electronic systems. A holistic discussion is presented, including the basics of interconnects, their impact on the system performance, popular machine learning techniques and their applications related to the interconnects. The performance evaluation, optimization and variability analysis of interconnects are discussed in detail. Future scope and overlook that are presented in the literature are also discussed.

GPR-Based Framework for Statistical Analysis of Gate Delay under NBTI and Process Variation Effects

“…Here, a predictive model can be defined as a regression problem via supervised learning. GPR is among the state-of-the-art ML algorithms for performing nonlinear regression [14], which has been widely applied in many cases, such as high interconnect design [15,16], signal integrity and microwave circuit applications [17], speech synthesis [18], soil moisture and temperature sensing [19], fault detection of chemical processes [20], etc.…”

Incorporation of tungsten or cobalt into TaN barrier layers controls morphology of deposited copper

“…These are particularly useful when combined with experimental methods [39]. Additionally, machine learning can now be applied to modelling the overall performance of interconnects which can save valuable time and resources during the development process [40]. Overall, theoretical studies make up only a small fraction of the research on advancing interconnect manufacturing leaving plenty of room to gain further insight into growth mechanisms and material interactions relevant for application in interconnect technology.…”

A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors

“…VER the past few years a number of fields have benefited from developments in machine learning (ML) beyond computer science [1], [2]. In recent times, ML techniques have emerged as valuable tools for enhancing semiconductor device modeling for electronic design automation [3][4][5][6].…”

“…It has been a driving force behind the rapid increase in computing power, energy efficiency, and the number of transistors incorporated into an integrated circuit (IC) over the past few years. Gate-all-around (GAA) Silicon (Si) 1 Rajat Butola, Yiming Li, and Sekhar Reddy Kola are with the Parallel and Scientific Computing Laboratory, Electrical Engineering and Computer nanosheet (NS) is such a nanoscale device that is used to produce chips under 5 nm technology node [19][20][21]. Thus, NS is one of the most advanced transistors for device logic applications for future technology nodes [22], [23].…”

“…These equations are utilized to represent the electrical behavior of devices. However, as reported in [38], it faces three key challenges (1) foundry secrecy: to keep its technology details confidential, (2) innovation requires new CMs which takes long time to develop, and (3) early evaluation of technology.…”