Magnetic Adder Based on Racetrack Memory

Trinh, Hong-Phuc; Zhao, Weisheng; Klein, Jacques-Olivier; Zhang, Yue; Ravelsona, D.; Chappert, C.

doi:10.1109/tcsi.2012.2220507

Cited by 74 publications

(41 citation statements)

References 25 publications

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“…Since addition is the basic operation of the arithmetic/logic unit of any processors, MFAs attract a lot of attention and several designs based on diverse technologies are proposed in the last years [18,19]. Here, we present a 1-bit MFA based on PMA STT MTJ (STT-MFA) [74] and a multi-bit MFA based on PMA racetrack memory [75]. Figure 25 shows a 1-bit STT-MFA circuit, which is based on the generic logic-inmemory structure [74].…”

Section: Magnetic Full Addermentioning

confidence: 99%

Current-Induced Magnetic Switching for High-Performance Computing

Zhang

Zhao

Wang

et al. 2015

Spintronics-Based Computing

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Section: Magnetic Full Addermentioning

confidence: 99%

Current-Induced Magnetic Switching for High-Performance Computing

Zhang

Zhao

Wang

et al. 2015

Spintronics-Based Computing

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“…274 Table 90. Performance comparison between the proposed write circuit and the write circuit of [123] at 32nm CMOS feature size and W/L = 10…………………………………. 285 Table 91.…”

Section: List Of Tablesmentioning

confidence: 99%

Section: Write Operationmentioning

confidence: 99%

“…As shown in Table 90 (bold entries identify the best metrics), the delay of the proposed write circuit is shorter than for [123]; improvements are also accounted in power dissipation and PDP. However, the number of transistors in the proposed write circuit is larger than [123]. The write operation is controlled by the two additional transistors (MWC1 and MWC2); this capability is not available using the circuit of [123].…”

Section: Write Operationmentioning

confidence: 99%

“…However, the number of transistors in the proposed write circuit is larger than [123]. The write operation is controlled by the two additional transistors (MWC1 and MWC2); this capability is not available using the circuit of [123].…”

Section: Write Operationmentioning

confidence: 99%

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Design and modeling of nonvolatile memories by resistive switching elements

Junsangsri¹

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With the continued scaling in the nano ranges, the technology roadmap predicted by Moore's Law is becoming difficult to meet. So-called emerging technologies have been widely reported to supersede or complement CMOS. This type of design style is commonly referred to as "hybrid" because it exploits different characteristics of emerging technologies. This is very attractive for memories in which the modular (cell-based) organization of these systems is well suited to new technologies and innovative paradigms for design. This research presents new hybrid memory design which employ emerging technologies; such as memristor, phase change memory (PCM), programmable metallization cell (PMC), and racetrack memory (RM); and CMOS. By introduced new HSPICE macromodel of these emerging technologies and their memory applications such as the nonvolatile memory cell, CAM, TCAM, NVSRAM, and crossbar array, hybrid nonvolatile memory cells are generated. With its nonvolatile storage element, fast switching time, low power consumption, and good scalability, the hybrid memory cell of emerging technologies and CMOS would be one of the most promising candidates for the next generation of the nonvolatile memory.iii ACKNOWLEDGEMENTS

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Magnetic Tunnel Junctions for Spintronics: Principles and Applications

Peng

Zhang

Wang

et al. 2014

Wiley Encyclopedia of Electrical and Electronics Engineering

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Spintronics has received a great attention and considerable interest within the past decades. As a core device in this discipline, magnetic tunnel junction (MTJ) evolved rapidly and already be used in applications such as hard disk drive (HDD) read head and magnetic random access memory (MRAM) etc. In this article, we review some basic effects related to MTJ, for example, giant magnetoresistance (GMR), tunnel magnetoresistance (TMR) and spin transfer torque (STT). Based on these theories, two kinds of MTJs, in‐plane and perpendicular MTJs, are introduced. Then, several magnetization switching methods, which include field‐induced switching, thermally assisted switching, STT switching and recent voltage‐controlled switching, are proposed. In the end, some important applications of MTJs are presented.

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Magnetic Adder Based on Racetrack Memory

Cited by 74 publications

References 25 publications

Current-Induced Magnetic Switching for High-Performance Computing

Current-Induced Magnetic Switching for High-Performance Computing

Design and modeling of nonvolatile memories by resistive switching elements

Magnetic Tunnel Junctions for Spintronics: Principles and Applications

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