Majority-Inverter Graph: A New Paradigm for Logic Optimization

Abstract

In this paper, we propose a paradigm shift in representing and optimizing logic by using only majority (MAJ) and inversion (INV) functions as basic operations. We represent logic functions by Majority-Inverter Graph (MIG): a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. We optimize MIGs via a new Boolean algebra, based exclusively on majority and inversion operations, that we formally axiomatize in this work. As a complement to MIG algebraic optimization, we develop powerful Boolean methods exploiting global properties of MIGs, such as bit-error masking. MIG algebraic and Boolean methods together attain very high optimization quality. Considering the set of IWLS'05 benchmarks, our MIG optimizer (MIGhty) enables a 7% depth reduction in LUT-6 circuits mapped by ABC while also reducing size and power activity, with respect to similar AIG optimization. Focusing on arithmetic intensive benchmarks instead, MIGhty enables a 16% depth reduction in LUT-6 circuits mapped by ABC, again with respect to similar AIG optimization. Employed as front-end to a delay-critical 22-nm ASIC flow (logic synthesis + physical design) MIGhty reduces the average delay/area/power by 13%/4%/3%, respectively, over 31 academic and industrial benchmarks. We also demonstrate delay/area/power improvements by 10%/10%/5% for a commercial FPGA flow.

Multi-level logic benchmarks: An exactness study

“…The MIG technique increases the number of nodes as the depth-optimization is more aggressive. Please note that more size optimization is possible if interleaving MIG depth optimization [25] with MIG size techniques in [26]. This would result in a similar script as the one used for AIG optimization.…”

“…2) Synthesis Setup: We considered three state-of-the-art synthesis techniques, namely AIG-optimization performed by ABC [19], MIG-optimization performed by MIGhty [23]- [25], and DSD-optimization performed by ABC [16]. Since our study targets depth-minimality, we considered depth-oriented synthesis scripts.…”

“…For AIG-optimization, we used the script resyn2rs; if -g iterated 10 times [22]. For MIG-optimization, we used the synthesis script described in [25]. For DSDoptimization, we used the dsd command available in ABC.…”

Endurance management for resistive Logic-In-Memory computing architectures

“…both area and latency when using MajorityInverter Graphs (MIG, [18]) [19]. Regarding write endurance, RM 3 has more flexibility in comparison with IMP by sharing the writes between three operands instead of one.…”

“…FOR PLIM ARCHITECTURE A. Preliminaries 1) Majority Inverter Graphs: MIG is a data structure for efficient representation of Boolean functions which consists of 3-input majority nodes and complemented edges [18], [20]. In general MIGs can be efficiently exploited for logicin-memory computing due to benefiting from the resistive majority property enabled by RM 3 [19], [21].…”