2002
DOI: 10.1103/physrevlett.89.025502
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Mapping of Electrostatic Potential in Deep Submicron CMOS Devices by Electron Holography

Abstract: Quantitative two-dimensional maps of electrostatic potential in device structures are obtained using off-axis electron holography with a spatial resolution of 6 nm and a sensitivity of 0.17 V. Estimates of junction depth and variation in electrostatic potential obtained by electron holography, process simulation, and secondary ion mass spectroscopy show close agreement. Measurement artifacts due to sample charging and surface "dead layers" do not need to be considered provided that proper care is taken with sa… Show more

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Cited by 104 publications
(43 citation statements)
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“…The influence of a defect-rich surface structure on quantitative potential maps is fully recognized in the experimental procedures, [1][2][3]6 without, however, giving a clear picture. Rau et al calibrated surface depletion layers ("dead layers") by measuring the thickness dependence of the electron wave phase shift.…”
Section: Discussionmentioning
confidence: 99%
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“…The influence of a defect-rich surface structure on quantitative potential maps is fully recognized in the experimental procedures, [1][2][3]6 without, however, giving a clear picture. Rau et al calibrated surface depletion layers ("dead layers") by measuring the thickness dependence of the electron wave phase shift.…”
Section: Discussionmentioning
confidence: 99%
“…2 McCartney et al and Gribelyuk et al did not find dead layers, instead coating of the TEM samples with a few 10 nm thick carbon layers in conventionally Ar ion milled samples is reported to prevent from surface charging. 1,6 The special case of idealized amorphous silicon surface layers in Sec. III A shows that ion beam damaged surfaces can, under certain circumstances, be considered as passive.…”
Section: Discussionmentioning
confidence: 99%
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“…Among the techniques that have been proposed so far, off-axis electron holography has demonstrated its capability to map out the 2D electrostatic potential distributions inside semiconductor devices with a spatial resolution of 3 nm and a sensitivity of 0.1 V, which is suitable for characterizing current devices having around 70 nm gate lengths or less [2]. However, the sample preparation has been known to be a key issue for voltage profiling by electron holography.…”
Section: Introductionmentioning
confidence: 99%
“…Since the phase shift of the electron wavefunction depends on the local electric field distributions within the sample, the electron holography technique can be used to provide quantitative information about electrostatic potential variations in materials, with nanometer-scale resolution. 9 Off-axis electron holography has been widely used to measure potential profiles associated with dopant distributions in, for example, Si p-n junctions, 10,11 and Si transistors, 12,13 including one device having a 30 nm gate length.…”
Section: Introductionmentioning
confidence: 99%