MASH ΣΔ modulators with a noise-shaped two-step ADC in the second stage

Shahghasemi, Mohsen; Yavari, Mohammad

doi:10.1016/j.vlsi.2016.10.002

Cited by 2 publications

(1 citation statement)

References 34 publications

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“…However, a major problem with adding multi-bit feedback paths is that even slight nonlinearity in the DAC feedback path (e.g. due to random component variations) to the first integrator can have disastrous consequences for the modulator performance [21] [22]. In this paper, 2 nd order DT modulator for IADC has been designed and implemented at 180nm technology for bio-medical applications.…”

Section: Introductionmentioning

confidence: 99%

10-Bit 200 kHz/8-Channel Incremental ADC for Biosensor Applications

Gupta¹,

Earnest²,

Mitra³

2022

J CIRCUIT SYST COMP

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In this paper, a second-order discrete-time (DT) modulator for 8-channel Incremental Sigma-Delta analog-to-digital converter (IADC) is presented for biomedical applications ranging from kHz. The proposed DT modulator with input bandwidth of 25[Formula: see text]kHz on each channel is sampled at 51.2[Formula: see text]MHz, with oversampling ratio of 128 implemented at 180[Formula: see text]nm technology. The proposed IADC has high resolution, multichannel A/D conversion, simple architecture, low offset, low gain error and low area over the standard ADCs available. Measured results show that the SNR, DR, ENOB, power consumption and chip area of the proposed IADC are 63.9[Formula: see text]dB, 62.2[Formula: see text]dB, 10.11 bits, 0.832[Formula: see text]mW and 0.032[Formula: see text]mm2, respectively, at 1.8V power supply. For testing purpose, the noncoherent sampling is done to get the FFT plot of the output signal. For further validation, the proposed second-order IADC was also designed and compared in MATLAB/Simulink.

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Section: Introductionmentioning

confidence: 99%