Maximum density of quantum information in a scalable CMOS implementation of the hybrid qubit architecture

Rotta, Davide; Michielis, M. De; Ferraro, Elena; Fanciulli, M.; Prati, Enrico

doi:10.1007/s11128-016-1282-3

Cited by 22 publications

(24 citation statements)

References 64 publications

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“…Universal QIP can be addressed by different approaches. First, we consider the universal set of single virtual qubit rotations and virtual controlled NOT (CNOT) logic ports 38 for a Steane code [7,1,3], so we adopt the definition of the three physical building blocks, 70 namely, a data qubit (D) capable of one-qubit and two-qubit logic gates and two types of communication qubits, i.e., the chain module (C) and the T module (T). A schematic representation of these devices is reported in Fig.…”

Section: Geometrical Constraints Of the Hybrid Qubit Architecturementioning

confidence: 99%

“…We note that previous theoretical works identified several strategies to obtain gate fidelity approaching 99.999%. 43,70 This may be good enough to enable QEC by means of the Steane code, which could deal with an error threshold in the range 10 −6 -10 −4 depending on the geometry.…”

Section: Geometrical Constraints Of the Hybrid Qubit Architecturementioning

confidence: 99%

“…9 At any rate, we remark that only a deep understanding of the noise model applicable to the hybrid qubit will definitely set the relevant specifications for gate fidelity to be compatible with a specific QEC scheme. 9,70 Such logical qubit therefore enables QEC and it is the functional building block for error-correcting quantum memory and fault-tolerant QIP. Differently, the implementation of surface code in the fourth column of Fig.…”

Section: 71mentioning

confidence: 99%

“…1 to accommodate all the adjacent gates and interconnections. 70 As a consequence, we set l SU = 2Δ IC to allow a realistic routing of the metal wires. We note that in all the technology nodes this size is significantly larger than the dopant scattering length.…”

Section: Technology-dependent Scaling In the Quantum Realmmentioning

confidence: 99%

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Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

et al. 2017

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Even the quantum simulation of an apparently simple molecule such as Fe 2 S 2 requires a considerable number of qubits of the order of 10 6 , while more complex molecules such as alanine (C 3 H 7 NO 2 ) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it naturally provides, together with qubit functionalities, the capability of nanometric, serial, and industrial-quality fabrication. The scaling trend of microelectronic devices predicting that computing power would double every 2 years, known as Moore's law, according to the new slope set after the 32-nm node of 2009, suggests that the technology roadmap will achieve the 3-nm manufacturability limit proposed by Kelly around 2020. Today, circuital quantum information processing architectures are predicted to take advantage from the scalability ensured by silicon technology. However, the maximum amount of quantum information per unit surface that can be stored in silicon-based qubits and the consequent space constraints on qubit operations have never been addressed so far. This represents one of the key parameters toward the implementation of quantum error correction for faulttolerant quantum information processing and its dependence on the features of the technology node. The maximum quantum information per unit surface virtually storable and controllable in the compact exchange-only silicon double quantum dot qubit architecture is expressed as a function of the complementary metal-oxide-semiconductor technology node, so the size scale optimizing both physical qubit operation time and quantum error correction requirements is assessed by reviewing the physical and technological constraints. According to the requirements imposed by the quantum error correction method and the constraints given by the typical strength of the exchange coupling, we determine the workable operation frequency range of a silicon complementary metal-oxide-semiconductor quantum processor to be within 1 and 100 GHz. Such constraint limits the feasibility of fault-tolerant quantum information processing with complementary metal-oxide-semiconductor technology only to the most advanced nodes. The compatibility with classical complementary metal-oxide-semiconductor control circuitry is discussed, focusing on the cryogenic complementary metal-oxide-semiconductor operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip via timedivision, frequency-division, and space-division multiplexing. The operation time range prospected for cryogenic control electronics is found to be compatible with the operation time expected for qubits. By combining the forecast of the development of scaled technology nodes with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm 2 for the 10 and 7-...

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Section: Geometrical Constraints Of the Hybrid Qubit Architecturementioning

confidence: 99%

Section: Geometrical Constraints Of the Hybrid Qubit Architecturementioning

confidence: 99%

Section: 71mentioning

confidence: 99%

Section: Technology-dependent Scaling In the Quantum Realmmentioning

confidence: 99%

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Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

et al. 2017

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“…A complete and detailed design of a scalable architecture based on this qubit type is reported in Ref. [28]. For the single hybrid qubit the Hamiltonian is equal to…”

Section: Double Quantum Dot Hybrid Qubitmentioning

confidence: 99%

Controlled-NOT gate sequences for mixed spin qubit architectures in a noisy environment

Ferraro

Fanciulli

Michielis

2017

Quantum Inf Process

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Explicit controlled-NOT gate sequences between two qubits of different types are presented in view of applications for large-scale quantum computation. Here, the building blocks for such composite systems are qubits based on the electrostatically confined electronic spin in semiconductor quantum dots. For each system the effective Hamiltonian models expressed by only exchange interactions between pair of electrons are exploited in two different geometrical configurations. A numerical genetic algorithm that takes into account the realistic physical parameters involved is adopted. Gate operations are addressed by modulating the tunneling barriers and the energy offsets between different couple of quantum dots. Gate infidelities are calculated considering limitations due to unideal control of gate sequence pulses, hyperfine interaction and charge noise.

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Coherence Time Analysis in Semiconducting Hybrid Qubit under Realistic Experimental Conditions

2018

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The unavoidable effect of the environmental noise due to nuclear spins and charge traps is included in the study of the hybrid qubit dynamics. Hybrid qubit owes its name to the advantageous combination of manipulation speed of a charge qubit with the longevity of a spin qubit. It consists of three electrons confined through external gate voltages in a double quantum dot and deserves special interest in quantum computation applications due to its advantages in terms of fabrication, control, and only electrical manipulation. The fluctuations of the global magnetic field do not affect the dynamics of the hybrid qubit that is defined in a decoherence‐free subspace. The main sources of decoherence come from local magnetic fluctuations and charge fluctuations. This work is based on the hypothesis that gate voltages are fixed and kept constant while qubit evolves in time. Coherence time of the hybrid qubit is extracted when model parameters take values achievable experimentally in the nuclear‐free isotope 28Si, natural Si, and GaAs hosts.

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Maximum density of quantum information in a scalable CMOS implementation of the hybrid qubit architecture

Cited by 22 publications

References 64 publications

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

Controlled-NOT gate sequences for mixed spin qubit architectures in a noisy environment

Coherence Time Analysis in Semiconducting Hybrid Qubit under Realistic Experimental Conditions

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