Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias

Jiang, Tengfei; Ryu, Suk Kyu; Zhao, Qian; Im, James S.; Huang, Rui; Ho, Paul S.

doi:10.1016/j.microrel.2012.05.008

Cited by 98 publications

(38 citation statements)

References 30 publications

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“…To further understand the deformation mechanisms underlying the measured curvature-temperature behavior of the TSV specimens, microstructure evolution of the Cu vias subjected to different thermal histories was studied [6]. A number of TSV specimens were each subjected to a single thermal cycle to different temperatures, and the measured curvatures are shown in Fig.…”

Section: Microstructure Analysismentioning

confidence: 99%

“…Clearly, a sub-micron resolution was achieved in the measurement, but the results provided only the sum of the two individual stress components in Si. Further understanding of the stress characteristics in the TSV structure requires detailed stress analysis to delineate the stress components and correlate the micro-Raman measurements with the thermal cycling experiments [6,9].…”

Section: Micro-raman Spectroscopymentioning

confidence: 99%

“…As a global measurement, the curvature change provides a measure of the average thermal stresses. The behavior can be correlated to the evolution of the Cu microstructure in the via when subjected to thermal processing, which was analyzed by focused ion beam (FIB) and electron backscatter diffraction (EBSD) techniques [6]. Based on the results from the microstructure analysis, the mechanisms underlying the linear and nonlinear temperature-curvature behavior of the TSV specimen are discussed.…”

Section: Introductionmentioning

confidence: 99%

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Thermomechanical characterization and modeling for TSV structures

Jiang

Ryu

Zhao

et al. 2014

AIP Conference Proceedings

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Abstract. Continual scaling of devices and on-chip wiring has brought significant challenges for materials and processes beyond the 32-nm technology node in microelectronics. Recently, three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to meet the future technology requirements. Among others, thermo-mechanical reliability is a key concern for the development of TSV structures used in die stacking as 3-D interconnects. This paper presents experimental measurements of the thermal stresses in TSV structures and analyses of interfacial reliability. The micro-Raman measurements were made to characterize the local distribution of the near-surface stresses in Si around TSVs. On the other hand, the precision wafer curvature technique was employed to measure the average stress and deformation in the TSV structures subject to thermal cycling. To understand the elastic and plastic behavior of TSVs, the microstructural evolution of the Cu vias was analyzed using focused ion beam (FIB) and electron backscattering diffraction (EBSD) techniques. Furthermore, the impact of thermal stresses on interfacial reliability of TSV structures was investigated by a shear-lag cohesive zone model that predicts the critical temperatures and critical via diameters.

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Section: Microstructure Analysismentioning

confidence: 99%

Section: Micro-raman Spectroscopymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Thermomechanical characterization and modeling for TSV structures

Jiang

Ryu

Zhao

et al. 2014

AIP Conference Proceedings

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“…Since Cu protrusion is a critical problem in the back-end-ofline (BEOL) process, several studies have been conducted to characterize and alleviate this phenomenon using experimental and numerical simulation methods. 7,8) It has been determined that Cu protrusion is not fully-reversible and that localized plastic deformation plays an important role in TSV protrusion. 9) Optimization of the annealing conditions is known to be an important factor to avoid further plastic deformation of copper in the vias.…”

Section: Introductionmentioning

confidence: 99%

Lower Protrusion of a Copper-Nickel Alloy in a Through-Silicon via and Its Numerical Simulation

et al. 2015

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The application of Cu-filled through-silicon via (TSV) in 3-D integrated circuit packaging faces several fabrication and reliability issues. In this study, we introduced a Cu-Ni alloy for TSV filling with a high filling speed and a reduced TSV protrusion. In particular, the characteristics of Cu-Ni via protrusions at various annealing temperatures (³200450°C) were investigated with experimental and numerical analysis and compared with Cu-filled vias. High speed Cu-Ni alloy filling into the vias was achieved without any defects by an electroplating process that used a periodic pulse reverse current waveform. The Cu-Ni alloy TSV showed lower via protrusion than the Cu TSV. The simulated protrusion heights of the Cu-Ni vias were in good agreement with the experimental results. The simulation results also indicated that the Cu-Ni TSVs has smaller protrusions than the Cu TSVs. As the annealing temperature was varied from 200 to 450°C, the protrusions increased gradually and became significant at an annealing temperature of 350°C. When the temperature was increased further, the protrusions became larger due to severe creep deformation. The von Mises stress also increased with increasing annealing temperature, and increased substantially at a temperature of 300°C due to the creep effect. In summary, the Cu-Ni alloy TSVs showed smaller protrusions relative to the Cu TSVs. The stress level of the Cu-Ni via was lower than that of the Cu via. These results indicate that the Cu-Ni alloy TSV had advantages in terms of high speed filling and smaller protrusions, demonstrating its promise as an alternative to current Cu TSV technologies.

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“…Such an unexpected fluctuation of the device function is one of the main reasons why CNT-based electronic devices have not yet been realized as commercial products, although almost a quarter century has passed since their discovery. 20 In any electronic device, the residual strain/stress is induced because of the thermal change 18,19 or the lattice mismatch between nearby layers. Taking these facts into consideration, to ensure the stable performance of CNT-based electronic devices and sensors, including our proposed CNT-based strain sensor, the prediction of electronic properties of CNTs under strain is indispensable.…”

mentioning

confidence: 99%

Quantitative evaluation of orbital hybridization in carbon nanotubes under radial deformation using π-orbital axis vector

2015

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When a radial strain is applied to a carbon nanotube (CNT), the increase in local curvature induces orbital hybridization. The effect of the curvature-induced orbital hybridization on the electronic properties of CNTs, however, has not been evaluated quantitatively. In this study, the strength of orbital hybridization in CNTs under homogeneous radial strain was evaluated quantitatively. Our analyses revealed the detailed procedure of the change in electronic structure of CNTs. In addition, the dihedral angle, the angle between π-orbital axis vectors of adjacent atoms, was found to effectively predict the strength of local orbital hybridization in deformed CNTs.

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Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias

Cited by 98 publications

References 30 publications

Thermomechanical characterization and modeling for TSV structures

Thermomechanical characterization and modeling for TSV structures

Lower Protrusion of a Copper-Nickel Alloy in a Through-Silicon via and Its Numerical Simulation

Quantitative evaluation of orbital hybridization in carbon nanotubes under radial deformation using π-orbital axis vector

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