Measurement and characterization of multi-layered interconnect capacitance for deep submicron VLSI technology

Cho, Dae‐Hyung; Seung, Manho; Kim, Nam-Ho; Park, Hun-Sup; Wee, Jae-Kyung; Park, Youngjune; Min, Hong-Shik

doi:10.1109/icmts.1997.589346

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“…It can measure total line capacitance to an accuracy of femto -Farad range. This method has been getting more and more attention and has been widely used to characterize on-chip interconnect capacitances with sub femto-farad resolution in recent years [4]- [10].…”

Section: Introductionmentioning

confidence: 99%

Interconnect capacitance characterization based on charge based capacitance measurement (CBCM) technique for DFM applications

Zhang

Tang

Gao

et al. 2008

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

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Interconnection parasItIc capacitance is the dominant delay and noise source in modem integrated circuits. This paper presents a test structure and a characterization method based on charge based capacitance measurement technique. The method could be implemented to study the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction, which can in tum be used in process/device modeling for design-for-manufacturing applications.

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Section: Introductionmentioning

confidence: 99%