Measurement and modelling of the emitter resistance of polysilicon emitter transistors

Wolstenholme, G.R.; Ashburn, P.; Jorgensen, N; Gold, D.; Booker, G. R.

doi:10.1109/bipol.1988.51044

Cited by 20 publications

(7 citation statements)

References 7 publications

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“…5 To ensure a proper control of the poly/monocrystalline silicon interface, a good understanding of both the oxide growth mechanisms and the dependence of device characteristics on interface thickness and other process parameters such as dopant concentration in the emitter polysilicon has to be obtained. For these ICs, usually bipolar-complementarymetal-oxide-semiconductor ͑BiCMOS͒ technologies are employed, where the bipolar transistors are integrated into a core CMOS process flow.…”

Section: Introductionmentioning

confidence: 99%

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As-doped polysilicon emitters with interfacial oxides and correlation to bipolar device characteristics

Tilke

Forster

Schupke

et al. 2005

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Section: Introductionmentioning

confidence: 99%

“…5 Drive-in temperature T DI , time t DI , and high concentration of As ͓As͔ in the emitter polysilicon 8 influence the oxide breakup and therefore ␤. It is well known that in the interface region these interfacial oxides break up during emitter anneal.…”

Section: Introductionmentioning

confidence: 99%

As-doped polysilicon emitters with interfacial oxides and correlation to bipolar device characteristics

Tilke

Forster

Schupke

et al. 2005

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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“…For this application the poly-Si is heavily doped and serves as a diffusion source for the formation of the emitter region as well as a contact to the emitter. 3 ' 4 Numerous studies have already been dedicated to understanding the poly-Si epitaxial realignment. The first is the morphology of the native silicon oxide film at the interface, inherent to the deposition technique.…”

Section: Introductionmentioning

confidence: 99%

Role of grain boundaries in the epitaxial realignment of undoped and As-doped polycrystalline silicon films

et al. 1993

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The early stages of the thermally induced epitaxial realignment of undoped and As-doped polycrystalline Si films deposited onto crystalline Si substrates were monitored by transmission electron microscopy. Under the effect of the heat treatment, the native oxide film at the poly-Si/c-Si interface begins to agglomerate into spherical beads. The grain boundary terminations at the interface are the preferred sites for the triggering of the realignment transformation which starts by the formation of epitaxial protuberances at these sites. This feature, in conjunction with the microstructure of the films during the first instants of the heat treatment, explains the occurrence of two different realignment modes. In undoped films the epitaxial protuberances, due to the fine grain structure, are closely distributed and grow together forming a rough interface moving toward the film's surface. For As-doped films, the larger grain size leaves a reduced density of realignment sites. Due to As doping some of these sites grow fast and form epitaxial columns that further grow laterally at the expense of the surrounding polycrystalline grains.

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“…For each type of device, the emitter resistance was measured on devices with different geometries and the Ning-Tang intercept [42] plotted as a function of reciprocal emitter area. A linear regression was performed through the data points with the specific interface resistivity given by the slope of the linear fit [43]. It can be seen that m for the in-situ phosphorus-doped transistors given the hydrogen bake and m for the equivalent transistors given the HF etch.…”

Section: B Electrical Characterizationmentioning

confidence: 99%

“…These results are consistent with a base current dominated by [42] as a function of reciprocal emitter area for transistors produced using the different types of ex-situ and in-situ cleans and different deposition systems. The Ning-Tang intercept was measured on different geometry transistors and the slope of the graph gives the specific interface resistivity [43].…”

Section: A Materials and Interface Characterizationmentioning

confidence: 99%

Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus-doped polysilicon emitter contacts

Rahim

Marsh

Ashburn

et al. 2001

IEEE Trans. Electron Devices

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Abstract-This paper investigates the effects of an in-situ hydrogen bake and an ex-situ hydroflouric acid (HF) etch prior to polysilicon deposition on the electrical characteristics of bipolar transistors fabricated with low thermal budget in-situ phosphorusdoped polysilicon emitter contacts. Emitter contact deposition in a UHV-compatible low pressure chemical vapor deposition (LPCVD) cluster tool is also compared with deposition in a LPCVD furnace. Transmission electron microscopy (TEM) and secondary ion mass spectroscopy (SIMS) are used to characterize the emitter contact material and the interface structure and a comparison is made with Gummel plots and emitter resistances on bipolar transistors. The SIMS results show that an in-situ hydrogen bake in a cluster tool gives an extremely low oxygen dose at the interface of 6.3 10 13 cm 2 , compared with 7.7 10 14 and 2.9 10 15 cm 2 for an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace, respectively. TEM shows that the in-situ hydrogen bake results in single-crystal silicon with a high density of defects, including dislocations and twins. The ex-situ HF etch gives polycrystalline silicon for deposition in both a cluster tool and a LPCVD furnace. The single-crystal silicon emitter contact has an extremely low emitter resistance of 21 m 2 in spite of the high defect density and the light emitter anneal of 30 s at 900 C. This compares with emitter resistances of 151 and 260 m 2 for the polycrystalline silicon contacts produced using an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace, respectively. These values of emitter resistance correlate well with the interface oxygen doses and the structure of the interfacial oxide layer. The high defect density in the single-crystal silicon is considered to be due to the high concentration of phosphorus ( 5 10 19 cm 3 ) in the as-deposited layers.Index Terms-Bipolar transistor, cluster tool, in-situ doped polysilicon, polycrystalline silicon, polysilicon, polysilicon emitter.

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Measurement and modelling of the emitter resistance of polysilicon emitter transistors

Cited by 20 publications

References 7 publications

As-doped polysilicon emitters with interfacial oxides and correlation to bipolar device characteristics

As-doped polysilicon emitters with interfacial oxides and correlation to bipolar device characteristics

Role of grain boundaries in the epitaxial realignment of undoped and As-doped polycrystalline silicon films

Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus-doped polysilicon emitter contacts

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