Mechanism of breakdown voltage wavering in power MOSFET induced by silicon crystalline defect

Weber, Yann

doi:10.1016/j.microrel.2011.07.040

Cited by 4 publications

(2 citation statements)

References 5 publications

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“…Так, в [2,3] розглянуто проблему дефектоутворення в структурах на основі GaN для силової електроніки, та впливу порушень структури кристалічної гратки на продуктивність і безвідмовність при високих напругах живлення. У [4,5] представлено вплив дефектів кристалічної структури кремнію на механізм генерації напруги пробою в низьковольтних силових MOSFET, що працюють у лавинному режимі. В [6] описано метод уникнення крайового пробою у лавинних фотодіодах на основі 4H-SiC за допомогою використання клиноподібної меза-структури.…”

Section: вступunclassified

Technological Causes of p-n-Junction Break-down of Silicon p-i-n Photodiodes

Kukurudziak¹

2022

Microsyst., Electron. & Acoust.

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During the manufacture of coordinate quadrant p-i-n photodiodes with a high reverse bias voltage Ubias≥200 V, it was observed the presence of a systematic lack of products at the level of the dark current of one (rarely several) photosensitive element. After measuring the volt-ampere characteristics, it was seen that the cause of this is a breakdown of the p-n junction. Effective methods of increasing the breakdown voltage are reducing the specific resistance of the silicon used, increasing the thickness of the substrate and the depth of the p-n junctions, reducing the concentration of alloying impurities, but these methods should be used in cases that allow the degradation of the relevant parameters to be neglected. In particular, it is necessary to provide a level of technology that reduces the probability of a breakdown. A number of technological factors that can be the reasons for reducing the breakdown voltage of the p-n junction have been established and investigated. Strong influence on the breakdown voltage. have crystallographic defects, in particular dislocations falling into the region of the p-n junction. By reducing the concentration of alloying impurities, it is possible to significantly reduce the density of dislocations with a small increase in the levels of dark currents. This helps to eliminate the probability of a breakdown. After operations of sprinkling chrome-gold on the reverse side of such a substrate, the appearance of breakdowns was detected. The cause of which are defects formed as a result of local melting of silicon when gold "droplets" with a temperature higher than the melting temperature of silicon fall on it, as a result of boiling in the evaporator. Іt is possible to reduce the probability of the appearance of these defects by spraying from closed evaporators or by increasing the etchability of spraying on the damper. During photolithography, in particular, when etching windows in the oxide, etching wedges are formed, which direct the output of the p-n junction to the surface at an acute angle. These areas are places with an increased level of electric field intensity, respectively, places of probable localization of the breakdown. This can be avoided by using photoresists that provide minimal etching wedges. Irregularities between the oxide windows can also lead to a decrease in the probo voltage, the probability of this can be reduced by careful control of the development and exposure operations and the use of defect-free templates. Another reason for a breakdown can be a violation of the p-n junction due to welding of the contact terminals. In this case, it is a thermal breakdown. This can be avoided by increasing the size of the contact pads with their expansion on silicon oxide, accordingly, welding on the surface of the oxide reduces the probability of a hole. Another method is a local increase in the depth of the p-n junction, but in this case additional technological operations must be carried out.

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Section: вступunclassified

Technological Causes of p-n-Junction Break-down of Silicon p-i-n Photodiodes

Kukurudziak¹

2022

Microsyst., Electron. & Acoust.

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“…The observation of photo emission from the backside of a chip like as ICs or LSIs was reported under small current conditions, such as measuring the breakdown voltage of the device [6]. However, in the power device, the backside of the chip is also covered by electrode metals for such large current use as UIS conditions.…”

Section: Introductionmentioning

confidence: 99%

Time resolved emission observation from top surface in avalanche breakdown of power MOSFET

Endo

Norimatsu

Nakashima

et al. 2014

2014 IEEE International Reliability Physics Symposium

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Time resolved emission (TRE) microscopy can detect photons, and its signal-to-noise (S/N) ratio is higher than that of Photo Emission Microscopy under weak emission conditions. This is the first study to show the TRE observation in avalanche breakdown through thick source metal from the top surface of power MOSFET. TRE is an effective method to detect several photons, however, the strong emission range saturate the output of TRE detectors and this phenomenon disturbs accurate photon measurement. Our study results show that the photon count behavior is consistent with the oscillation of avalanche current. Also, the distribution of photon count density in the regions of the device is different, which indicates that there is distribution of current density in MOSFET. The described approach has the capacity to observe the current density distribution without any power device electrode metal removal and can be applied to measure the oscillation behavior of avalanche current.

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