2004 IEEE Radiation Effects Data Workshop (IEEE Cat. No.04TH8774)
DOI: 10.1109/redw.2004.1352914
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Megarad total ionizing dose and single event effects test results of a radhard-by-design 0.25 micron ASIC [space applications]

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Cited by 8 publications
(5 citation statements)
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“…Additional redundancy techniques can be applied where higher SEE hardness is required. A typical test case in 0.25 m CMOS, exceeding most mission requirements, is reported in [12] as follows:…”
Section: B Integrated Cmos Solar Cell Test Resultsmentioning
confidence: 99%
“…Additional redundancy techniques can be applied where higher SEE hardness is required. A typical test case in 0.25 m CMOS, exceeding most mission requirements, is reported in [12] as follows:…”
Section: B Integrated Cmos Solar Cell Test Resultsmentioning
confidence: 99%
“…As long as the basic approach is followed, the hardness of the developed library should be comparable to similar libraries. For example, a recent design and test campaign in 0.25 m CMOS achieved the following typical results, which are suitable for most bare die SoC applications in hostile environments [7]:…”
Section: B Rhbd Library Designmentioning
confidence: 96%
“…Figure 6 shows the ID(VG) characteristics before irradiation and after 128 krad(Si) for both NMOS and PMOS individual transistors. DVT is negative since the radiation-induced trapped charges are mainly positive whatever the type of the transistor [7].…”
Section: Tid Characterization Of Individual Transistorsmentioning
confidence: 99%
“…Total ionizing dose (TID) is known to enhance the susceptibility of circuits to single-event effects (SEE) by modifying the electrical characteristics of individual transistors inside the exposed circuit [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. In the case of static random-access memories (SRAMs), the radiation-induced defects and trapped charges, mainly in oxide and dielectric layers and at their interfaces with the semiconductor, alter the electrical conditions within the SRAM cells, affecting transistor threshold voltages and consequently SRAM stability.…”
Section: Introductionmentioning
confidence: 99%