Memory Row Reuse Distance and its Role in Optimizing Application Performance

KandemirMahmut,; Zhaohui,; TangXulong,; KarakoyMustafa,

doi:10.1145/2796314.2745867

Cited by 5 publications

(5 citation statements)

References 34 publications

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“…Our mechanism outperforms NUAT and achieves a speedup close to LL-DRAM with a few exceptions. Applications that have a wide gap in performance between ChargeCache and LL-DRAM (e.g., mcf, omnetpp) access a large number of DRAM rows and exhibit high row-reuse distance [63]. A high row-reuse distance indicates that there is a large number of accesses to other rows between two accesses to the same row.…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency

Hassan¹,

Pekhimenko²,

Vijaykumar³

et al. 2018

Preprint

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Section: Resultsmentioning

confidence: 99%

“…Our paper is the rst work to observe row-level temporal locality (RLTL). Note that RLTL is di erent from Row-Reuse Distance [63] that a prior work studies. Row-Reuse Distance is a metric indicating the number of accesses between two consecutive accesses to the same row.…”

Section: Applicability To Emerging Dram Standardsmentioning

confidence: 99%

Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency

Hassan¹,

Pekhimenko²,

Vijaykumar³

et al. 2018

Preprint

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“…First, achieving low performance overhead is a key challenge for a throttling mechanism because many benign applications tend to repeatedly activate a DRAM row that they have recently activated [44,45,57,76]. This can potentially cause a throttling mechanism to mistakenly throttle benign applications, thereby degrading system performance.…”

Section: Rowblockermentioning

confidence: 99%

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

Yağlıkçı,

Patel,

Kim

et al. 2021

Preprint

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Aggressive memory density scaling causes modern DRAM devices to suffer from RowHammer, a phenomenon where rapidly activating (i.e., hammering) a DRAM row can cause bit-flips in physically-nearby rows. Recent studies demonstrate that modern DDR4/LPDDR4 DRAM chips, including chips previously marketed as RowHammer-safe, are even more vulnerable to RowHammer than older DDR3 DRAM chips. Many works show that attackers can exploit RowHammer bit-flips to reliably mount system-level attacks to escalate privilege and leak private data. Therefore, it is critical to ensure RowHammersafe operation on all DRAM-based systems as they become increasingly more vulnerable to RowHammer. Unfortunately, state-of-the-art RowHammer mitigation mechanisms face two major challenges. First, they incur increasingly higher performance and/or area overheads when applied to more vulnerable DRAM chips. Second, they require either closely-guarded proprietary information about the DRAM chips' physical circuit layouts or modifications to the DRAM chip design.In this paper, we show that it is possible to efficiently and scalably prevent RowHammer bit-flips without knowledge of or modification to DRAM internals. To this end, we introduce BlockHammer, a low-cost, effective, and easy-to-adopt Row-Hammer mitigation mechanism that prevents all RowHammer bit-flips while overcoming the two key challenges. BlockHammer selectively throttles memory accesses that could otherwise potentially cause RowHammer bit-flips. The key idea of Block-Hammer is to (1) track row activation rates using area-efficient Bloom filters, and (2) use the tracking data to ensure that no row is ever activated rapidly enough to induce RowHammer bit-flips. By guaranteeing that no DRAM row ever experiences a RowHammer-unsafe activation rate, BlockHammer (1) makes it impossible for a RowHammer bit-flip to occur and (2) greatly reduces a RowHammer attack's impact on the performance of co-running benign applications. Our evaluations across a comprehensive range of 280 workloads show that, compared to the best of six state-of-the-art RowHammer mitigation mechanisms (all of which require knowledge of or modification to DRAM internals), BlockHammer provides (1) competitive performance and energy when the system is not under a RowHammer attack and (2) significantly better performance and energy when the system is under a RowHammer attack.

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“…Thus, by tuning this value so that it is much less than the number of buckets in a physical memory page, we ensure that most pairs of candidate buckets fall within the same page of memory. This optimization improves both TLB and DRAM row buffer hit ratios, which are crucial for maximizing performance [8,39,83]. Further, we select an OF F RAN GE that is a power of two so that modulo operations can be done with a single logical AND.…”

Section: Hashingmentioning

confidence: 99%

Morton filters

Breslow

Jayasena

2018

Proc. VLDB Endow.

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Approximate set membership data structures (ASMDSs) are ubiquitous in computing. They trade a tunable, often small, error rate () for large space savings. The canonical ASMDS is the Bloom filter, which supports lookups and insertions but not deletions in its simplest form. Cuckoo filters (CFs), a recently proposed class of ASMDSs, add deletion support and often use fewer bits per item for equal. This work introduces the Morton filter (MF), a novel AS-MDS that introduces several key improvements to CFs. Like CFs, MFs support lookups, insertions, and deletions, but improve their respective throughputs by 1.3× to 2.5×, 0.9× to 15.5×, and 1.3× to 1.6×. MFs achieve these improvements by (1) introducing a compressed format that permits a logically sparse filter to be stored compactly in memory, (2) leveraging succinct embedded metadata to prune unnecessary memory accesses, and (3) heavily biasing insertions to use a single hash function. With these optimizations, lookups, insertions, and deletions often only require accessing a single hardware cache line from the filter. These improvements are not at a loss in space efficiency, as MFs typically use comparable to slightly less space than CFs for the same .

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Memory Row Reuse Distance and its Role in Optimizing Application Performance

Cited by 5 publications

References 34 publications

Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency

Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

Morton filters

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