Memristive Crossbar Arrays for Storage and Computing Applications

Implementation of Convolutional Neural Networks in Memristor Crossbar Arrays with Binary Activation and Weight Quantization

“…However, reliability issues persist in memristive devices, particularly concerning device-to-device (D2D) or cycle-to-cycle (C2C) variations arising due to the switching mechanism of memristive devices, which is predominantly based on the soft breakdown of dielectric layers. − Such variations can significantly degrade the performance of neural networks as inaccurate device states hinder precise VMM operations and lead to computation errors. Although a memristor array structure with active devices such as a transistor has been demonstrated to improve cell selectivity, − a passive crossbar array without active devices is advantageous for high-density integration of 4F 2 , thanks to the cross-point array structure. − With increasing cell resistance to mitigate IR drop caused by line resistances, the sneak path current issue in the passive crossbar array can be suppressed by designing bias schemes such as half-V and third-V schemes. , While the sneak path issue can be effectively suppressed by self-rectifying or monolithic integrable selectors, − it becomes negligible in a passive crossbar array as well during VMM operations because all the WLs and bitlines (BLs) are connected to known potential values, unlike stand-alone memory operations where most devices are on unselected WLs and BLs …”

S‐parameter extraction for electromagnetic modelling of memristor‐based crossbar array circuits

“…The capacity of memristors to emulate synaptic behaviour renders this circuit structure highly valuable for building artificial neural networks and enabling efficient neuromorphic computing architectures [2–4]. Even though researches have shown the promising prospect of memristor‐based crossbar array circuit for applications in data storage and neuromorphic computing [5–8], its development faces a significant hurdle in the form of electromagnetic effects such as cross‐talk, parasitic effects, and electromagnetic radiation. These effects may degrade the accuracy and robustness of the memristor‐based crossbar array circuits, posing a critical challenge to their advancement [9, 10].…”

Enhanced linear and symmetric synaptic weight update characteristics in a Pt/p-LiCoOx/p-NiO/Pt memristor through interface energy barrier modulation by Li ion redistribution

“…If the weight-tunable conductance change could be achieved in an analog manner, it would enable to store multibit (or analog) state information rather than storing digital-type information in the binary state of 0 and 1. 9 As among the two-terminal memristor devices, resistive random access memory devices (RRAM), including conductive bridge random access memory (CBRAM) using a metallic filament, valence change memory (VCM) with an oxygen-vacancy filament, and interfacial-type RRAM with oxygen redistribution particularly at the interface, have been reported to have low energy consumption down to sub-pJ per synaptic event and good scalability for high-density integration, forming a crossbar array structure with CMOS compatibility. [10][11][12] To date, RRAM devices with a variety of oxides have been researched for synaptic device application, such as HfO 2 , [13][14][15] Ta 2 O 3 , [16][17][18] WO x , [19][20][21] TiO 2 , [22][23][24] CeO 2 , 7,25,26 ZnO, [27][28][29] NiO, [30][31][32] SrFeO x , 33 and PCMO.…”