Memristive Logic in Crossbar Memory Arrays: Variability-Aware Design for Higher Reliability

Abstract

The advent of the first TiO2-based memristor in 2008 revived the scientific interest both from academia and industry for this device technology and has so far led to several emerging applications including logic and in-memory computing. Several memristive logic families have been proposed in the current quest for energy-efficient future computing systems. However, the limited device endurance and variability (both cycleto-cycle and device-to-device) are important parameters to be considered in the assessment of logic operations. In this work we used an accurate physics-based model of a bipolar memristor (supporting parasitics of the device structure and variability of switching voltages and resistance states) and demonstrate that performance of memristor-based in-memory computations can de degraded owing to both variability and state drift impact, if such features are not properly considered in the design flow. Inspired on pseudo-NMOS ratioed logic and based upon a CMOS-like logic scheme, we propose a crossbar-compatible memristive ratioed logic style which is tolerant to device variability and does not affect device endurance as computations do not involve conditional switching of memristors. Using the Cadence Virtuoso suite, we compare this logic scheme with MAGIC and CNIMP approaches, focusing on the universal NOR gate and complex logic functions.

Memristive Non-Volatile Memory Based on Graphene Materials

“…With Chua's perspective, all 2D NVM devices based on resistance switching performance are memristors, regardless of the device materials and physical operating mechanisms [101][102][103][104]. Researchers from Hewlett-Packard (HP) Laboratory firstly reported that they developed high-density non-volatile memories with a crossbar-based structure [105]. With a combination of complementary metal-oxide-semiconductor (COMS) technology and nanoscale-level processed memristors, profound influence will be observed on not only the flash memory industry but also the computing process of digital and neuromorphic systems.…”

“…With a combination of complementary metal-oxide-semiconductor (COMS) technology and nanoscale-level processed memristors, profound influence will be observed on not only the flash memory industry but also the computing process of digital and neuromorphic systems. The memristor device exhibits a dynamical resistance state determined by its excitation history, which is used to build transistor-less nonvolatile semiconductor memory (NVSM), commonly known as RRAM [101][102][103][104][105][106].…”

Robust Circuit and System Design for General-Purpose Computational Resistive Memories

“…processing was built upon sequential stateful logic operations based on conditional switching of memristors [12], which implies important latency constraints and reliability issues, as identified in References [13,14], for MAGIC-and IMPLY-based circuits. Likewise, given that majority and inversion operations together form a functionally complete set, some works have suggested using these primitives for in-memory computations.…”

Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford–PKU Model

“…However, permission to use this material for any other other purposes must be obtained from the IEEE by sending a request to pubs-permissions@ieee.org array) and logic (e.g. large V SET variation can result in failure of N OR gates implemented in memory array [9]). While variations have been utilized for some applications like stochastic learning and physical unclonable functions [10]- [12], they remain a hurdle for memory and other deterministic computing applications.…”