Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies

Kvatinsky, Shahar; Satat, Guy; Wald, Nimrod; Friedman, Eby G.; Kolodny, Avinoam; Weiser, Uri

doi:10.1109/tvlsi.2013.2282132

Cited by 527 publications

(311 citation statements)

References 36 publications

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“…By using 27 memristors an 8-bit full adder is designed, which requires 184 computational steps to complete its task. This shows about 20 percent faster performance in comparison with the techniques presented in [6] and [7]. …”

Section: Discussionmentioning

confidence: 84%

“…The proposed method in [6] has used 712 computational steps and it also needs 29 memristors for implementing an 8-bit full adder. In [7] 27 memristors are used for implementing an 8-bit full adder with 232 computational steps. The proposed method is based on architecture which is depicted in Fig.…”

Section: -Bit Memristor Based Full Adder Based On Materials Implmentioning

confidence: 99%

“…This full adder completes its task in 184 computational steps. It lowers 48 steps in comparison with 8-bit full adder designed in [7]. In Table 4 and Table 5 logics and input and output values are defined in each step.…”

Section: False (S)mentioning

confidence: 99%

“…This full adder is designed with 27 memristors and it needs 184 computational steps for completing its operation which is faster than previous designs [6][7].…”

Section: Introductionmentioning

confidence: 99%

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Optimized implementation of memristor-based full adder by material implication logic

Teimoory

Amirsoleimani

Shamsi

et al. 2014

2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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Abstract-Recently memristor-based applications and circuits are receiving an increased attention. Furthermore, memristors are also applied in logic circuit design. Material implication logic is one of the main areas with memristors. In this paper an optimized memristor-based full adder design by material implication logic is presented. This design needs 27 memristors and less area in comparison with typical CMOS-based 8-bit full adders. Also the presented full adder needs only 184 computational steps which enhance former full adder design speed by 20 percent.

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Section: Discussionmentioning

confidence: 84%

Section: -Bit Memristor Based Full Adder Based On Materials Implmentioning

confidence: 99%

Section: False (S)mentioning

confidence: 99%

“…This full adder is designed with 27 memristors and it needs 184 computational steps for completing its operation which is faster than previous designs [6][7].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Optimized implementation of memristor-based full adder by material implication logic

Teimoory

Amirsoleimani

Shamsi

et al. 2014

2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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“…So far a variety of approaches has been proposed for synthesis of logic-in-memory computing circuits, mostly based on material implication (IMP: p → q =p ∨ q) [12], [13] and some using other basic operations [14], [15], [11]. In all these approaches, the target function can only be executed using a certain number of RRAM devices and after a number of operations, which increases rapidly as the size of the function increases.…”

Section: Logic-in-memory Write Trafficmentioning

confidence: 99%

Endurance management for resistive Logic-In-Memory computing architectures

Shirinzadeh

Soeken

Gaillardon

et al. 2017

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2017

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Abstract-Resistive Random Access Memory (RRAM) is a promising non-volatile memory technology which enables modern in-memory computing architectures. Although RRAMs are known to be superior to conventional memories in many aspects, they suffer from a low write endurance. In this paper, we focus on balancing memory write traffic as a solution to extend the lifetime of resistive crossbar architectures. As a case study, we monitor the write traffic in a Programmable Logic-in-Memory (PLiM) architecture, and propose an endurance management scheme for it. The proposed endurance-aware compilation is capable of handling different trade-offs between write balance, latency, and area of the resulting PLiM implementations. Experimental evaluations on a set of benchmarks including large arithmetic and control functions show that the standard deviation of writes can be reduced by 86.65% on average compared to a naive compiler, while the average number of instructions and RRAM devices also decreases by 36.45% and 13.67%, respectively.

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Emerging Memory Structures for VLSI Circuits

Garzón¹,

Yavits²,

Lanuzza³

et al. 2022

Wiley Encyclopedia of Electrical and Electronics Engineering

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Ever since the emergence of the electrical computer and the Von Neumann model, computer architects have adhered to a well‐structured hierarchy of memory solutions, clearly trading off performance and capacity with cost. The ubiquitous memory technologies, dominated by SRAM, DRAM, Flash, and magnetic hard disks, are each situated in a well‐defined location within this hierarchy. However, as processes have scaled into deep nanometer feature sizes and the demand for larger capacities and bandwidths increases, these traditional options face tough challenges and may be limited in their ability to continue to provide the new requirements. New technologies, such as phase change memory (PCM), magnetic RAM (MRAM), and resistive RAM (RRAM), have been researched and developed over the recent past in an attempt to meet these demands and replace some or all of the traditional technologies. In this article, the primary technologies are overviewed, including those that currently fill the memory hierarchy pyramid, the primary candidates to join or replace them in the near‐term, and a number of newer candidates that may arise as legitimate solutions in the farther term. In addition, an overview of the current state of processing within the emerging memory technologies is provided, as an attempt to break free of the traditional Von Neumann paradigm to overcome the energy and performance bottlenecks in modern systems.

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Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies

Cited by 527 publications

References 36 publications

Optimized implementation of memristor-based full adder by material implication logic

Optimized implementation of memristor-based full adder by material implication logic

Endurance management for resistive Logic-In-Memory computing architectures

Emerging Memory Structures for VLSI Circuits

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