MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment

Seto, Daisaku; Watanabe, Minoru

doi:10.1007/978-3-642-12133-3_14

Cited by 5 publications

(3 citation statements)

References 13 publications

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“…3 shows photographs of the MEMS optically reconfigurable gate array part. The MEMS optically reconfigurable gate array part was constructed using a 532 nm, 300 mW laser (torus 532; Laser Quantum), a MEMS holographic memory, and an ORGA-VLSI [9] [12]. The laser was shared and used as emulating 64 lasers.…”

Section: B Binary Holographic Memory Calculation Methods For a Mems Mmentioning

confidence: 99%

“…1 [12]. This system comprises a wireless communication circuit, an EEPROM/SRAM, a MEMS device, and an optically reconfigurable gate array VLSI (ORGA-VLSI).…”

Section: B Rapidly Reparable Hardware Systemmentioning

confidence: 99%

“…An ORGA-VLSI chip was fabricated using a 0.35 m triple-metal CMOS process [9] [12]. The ORGA-VLSI chip consists of 4 logic blocks, 5 switching matrices, and 12 I/O bits.…”

Section: B Orga-vlsi Chipmentioning

confidence: 99%

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A 64-context MEMS optically reconfigurable gate array

Yamaji

Watanabe

2010

2010 International Conference on Field-Programmable Technology

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Demand for use of FPGAs in space is increasing to support hardware repair and hardware update functions in addition to software repair and update functions in spacecraft, satellites, space stations, and other applications. Under a space radiation environment, embedded devices must allow for incidence of high-energy charged particles. Such incidence can cause single or multi-event latch-up (S/MEL)-associated troubles and single or multi-event upset (S/MEU)-associated temporary failures. Although an FPGA, because of its programmability, presents the advantageous capabilities of recovering from and updating after S/MEL-associated troubles, the FPGA can not guard itself completely from S/MEU-associated temporary failures that might arise on its configuration SRAM. This paper therefore presents a proposal for a 64-context MEMS optically reconfigurable gate array that can support a remotely updatable hardware function, can quickly repair S/MEL-associated permanent failures, and can perfectly guard itself from S/MEU-associated temporary failures that can occur in a space radiation environment.

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Section: B Binary Holographic Memory Calculation Methods For a Mems Mmentioning

confidence: 99%

“…1 [12]. This system comprises a wireless communication circuit, an EEPROM/SRAM, a MEMS device, and an optically reconfigurable gate array VLSI (ORGA-VLSI).…”

Section: B Rapidly Reparable Hardware Systemmentioning

confidence: 99%