Metal–Polymer Composite Interconnections for Ultra Fine-Pitch Wafer Level Packaging

Abstract

The decrease in feature sizes of microelectronic devices has underlined the need for higher number of input-outputs (I/Os) in order to increase its functionality. This has spurred a great interest in developing electronic packages with fine and ultra fine pitches (20-100 m). Most of the compliant interconnects that are currently being developed have inductance and resistance higher than desirable. This paper presents a novel low-temperature fabrication process that combines polymer structures with electroless copper plating to create low stress composite structures for extremely fine-pitch wafer level packages. Analytical models for these structures justify the stress reduction at the interfaces and superior reliability as integrated circuit (IC)-package interconnects. Low coefficient of thermal expansion (CTE) polyimide structures with ultra-low stress, high toughness, and strength were fabricated using plasma etching. The dry etching process was tuned to yield a wall angle above 80 . The etching process also leads to roughened sidewalls for selective electroless copper plating on the sidewalls of polymer structures. This work also describes a selective electroless plating synthesis route to develop thin IC-package bonding interfaces with lead-free solder. Lead-free alloy films were deposited from aqueous plating solutions consisting of suitable metal salts and reducing agents at 45 C. The lead-free solder composition was controlled by altering the plating bath formulation. Solder film formed from the above approach was demonstrated to bond the metal-coated polymer interconnects with the copper pads on the substrate using a standard reflow process. Metal-coated polymer structures in conjunction with the thin solder bonding films can provide low-cost high-performance solutions for wafer-level packaging.

Residue-free plasma etching of polyimide coatings for small pitch vias with improved step coverage

“…Anisotropic etching is needed in order to obtain vertical vias for subsequent electro(less) plating of metal. 9,10 This technique allows high density, fine pitch vias fabrication, provided that a good anisotropy can be achieved for the PI layer etching.…”

Microfabrication of functional polyimide films and microstructures for flexible MEMS applications

“…6a ), the removal of residues is crucial for many applications. A simple approach is to use ultrasonic cleaning 114 . Several methods have been proposed to achieve the residue-free plasma etching of polyimide.…”

Ultrafine Filteration of Metal Catalysts Enables Fabrication of Silicon Nanowires with Diameter Approaching a Unit Cell Size

“…Study of the lattice dynamics of SiNWs using Raman spectroscopy provides valuable structural information indicated by characteristic changes in the Raman spectrum such as peak shift, and asymmetric broadening. ,, Intensive studies on the theoretical models to explain the Raman responses have been conducted and discussed in parallel with experimental data obtained by various groups. , The Raman spectra of fabricated SiNWs are plotted as a function of size in Figure c. The Raman measurements were conducted using low laser power at room temperature to avoid heating effects.…”