MH Cache

Park, Jungwoo; Lee, Myoungjun; Kim, Soontae; Ju, Minho; Hong, Jeongkyu

doi:10.1145/3328520

Cited by 8 publications

(2 citation statements)

References 30 publications

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“…This small increase in power dissipation can be managed through power-saving techniques, such as those found in refs. [17,18,[23][24][25], thus not prohibiting the adoption of DPCAM in multi-core systems.…”

Section: Authormentioning

confidence: 99%

New Content Addressable Memory Architecture for Multi-Core Applications

Abumwais,

Obaid

2024

Computer Memory and Data Storage

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The future of massively parallel computation appears promising due to the emergence of multi- and many-core computers. However, major progress is still needed in terms of the shared memory multi- and many-core systems, specifically in the shared cache memory architecture and interconnection network. When multiple cores try to access the same shared module in the shared cache memory, issues arise. Cache replacement methods and developments in cache architecture have been explored as solutions to this. This chapter introduces the Near-Far Access Replacement Algorithm (NFRA), a new hardware-based replacement technique, as well as a novel dedicated pipeline cache memory design for multi-core processors, known as dual-port content addressable memory (DPCAM). The experiments show that the access latency for write/read operations of a DPCAM is lower than that of a set-associative (SA) cache memory, with the latency of a write operation staying the same regardless of the size of the DPCAM. It is estimated that the power usage will be 7% greater than a SA cache memory of the same size.

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Section: Authormentioning

confidence: 99%

New Content Addressable Memory Architecture for Multi-Core Applications

Abumwais,

Obaid

2024

Computer Memory and Data Storage

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“…Critically, these proposed RAMs can be rapidly and reversibly switched between their different states, thus offering the possibility of realizing in-memory logic operations, which is considered the key CPU requirement in nanoscale devices. Non-volatile RAM offers a number of key advantages in this regard, including its high integration density [29][30][31][32], fast switching speed [33][34][35][36], low energy consumption [37][38][39][40], and long data retention [41][42][43][44]. This makes them eminently suitable for the development of future computational memory applications.…”

Section: Introductionmentioning

confidence: 99%

In-Memory Logic Operations and Neuromorphic Computing in Non-Volatile Random Access Memory

Xiong

et al. 2020

Materials

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Recent progress in the development of artificial intelligence technologies, aided by deep learning algorithms, has led to an unprecedented revolution in neuromorphic circuits, bringing us ever closer to brain-like computers. However, the vast majority of advanced algorithms still have to run on conventional computers. Thus, their capacities are limited by what is known as the von-Neumann bottleneck, where the central processing unit for data computation and the main memory for data storage are separated. Emerging forms of non-volatile random access memory, such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory, and resistive random access memory, are widely considered to offer the best prospect of circumventing the von-Neumann bottleneck. This is due to their ability to merge storage and computational operations, such as Boolean logic. This paper reviews the most common kinds of non-volatile random access memory and their physical principles, together with their relative pros and cons when compared with conventional CMOS-based circuits (Complementary Metal Oxide Semiconductor). Their potential application to Boolean logic computation is then considered in terms of their working mechanism, circuit design and performance metrics. The paper concludes by envisaging the prospects offered by non-volatile devices for future brain-inspired and neuromorphic computation.

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Asymmetric-Resistive-Switching Device with Reconfigurable Synaptic Functions for Logic-In-Memory

Zhang,

Guo,

Zhou

et al. 2024

ACS Appl. Eng. Mater.

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Memristors are considered a very important component to build artificial neural networks and realize logic-inmemory computing that could revolutionize current von Neumann computing architectures. With a significant resistance switching behavior, memristor has ability of simulating neuromorphic computing in human brain. However, the development of memristor is restricted by reliability, manufacturing consistency, and fundamental mechanisms. To conquer these problems, a longterm stable device, the high-quality deposition method, and the investigation on the mechanism are required. In this work, a memristor with an asymmetric-resistive-switching (ARS) behavior was fabricated via the sputtering method, which is based on the structure of Mo/ZnO/In-doped Tin Oxide (ITO). It presented a unique voltage-controlled resistance switching behavior with multistate, which has long-term endurance and low volatility. It demonstrates long-term potentiation and depression characteristics. The mechanism of the unique ARS behavior was discussed. The ARS behavior could realize coupled AND and OR logic-in-memory operation. This device provides a promising application in the complex integrated circuits and artificial intelligence.

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MH Cache

Cited by 8 publications

References 30 publications

New Content Addressable Memory Architecture for Multi-Core Applications

New Content Addressable Memory Architecture for Multi-Core Applications

In-Memory Logic Operations and Neuromorphic Computing in Non-Volatile Random Access Memory

Asymmetric-Resistive-Switching Device with Reconfigurable Synaptic Functions for Logic-In-Memory

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