Microbeam Heavy-Ion Single-Event Effect on Xilinx 28-nm System on Chip

Wu, Yang; Du, Xuecheng; He, Chaohui; Shi, Shuting; Cai, Li; Ning, Hui; Guo, Gang; Huang, Cheng‐Liang

doi:10.1109/tns.2017.2776244

Cited by 20 publications

(10 citation statements)

References 19 publications

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“…The experimental platform for the test is shown in Figure 4. The SEE cross-section calculation formula [15] is as follows…”

Section: Analysis Of Experimental Resultsmentioning

confidence: 99%

Single event effect evaluation of different communication ways based on 40nm SRAM-FPGA

Zhao

et al. 2023

Third International Conference on Artificial Intelligence and Computer Engineering (ICAICE 2022)

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Field-programmable gate array (FPGA) is now considered by an increasing number of designers in various fields of application, such as space and aircraft embedded control systems, image and signal processing. It is a popular way to design different serial communication protocols including serial and network communications implemented by FPGA, which ensure data transfer accuracy and timing. However, single event effects (SEE) can pose a serious threat to the reliability of FPGA in the radiation environments. In order to evaluate the reliability and failure modes of different communication interfaces in radiation environments, three communication protocols were tested by alpha radiation source, including universal asynchronous receiver/transmitter (UART), ethernet, and universal serial bus (USB). The experiments have presented the failure modes and SEE cross sections to different communication ways.

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“…The experimental platform for the test is shown in Figure 4. The SEE cross-section calculation formula [15] is as follows…”

Section: Analysis Of Experimental Resultsmentioning

confidence: 99%

Single event effect evaluation of different communication ways based on 40nm SRAM-FPGA

Zhao

et al. 2023

Third International Conference on Artificial Intelligence and Computer Engineering (ICAICE 2022)

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“…The MCC reliability prediction requires a parametrization of the resource susceptibilities of the hardware platform. This is expressed as cross sections σ i and has been retrieved from [14] caches have been retrieved from [16]. The L2 cross section has been extrapolated from σ L1 , assuming an identical cell layout for L1 and L2.…”

Section: Case-study and Discussionmentioning

confidence: 99%

“…The regular structure of BRAM is more susceptible to soft errors than CMEM and registers, hence [14] 2) Processor resources: Analogous to the FPGA fabric, different resources can be distinguished within a processor system. For the investigated Zynq-7000 architecture, the SEE sensitivity and respective cross sections σ i have been evaluated for five functional blocks (on-chip memory, L1d cache, ALU, FPU, and peripheral) [16]. At this point we resign a further decomposition of resources due to the lack of test data on bit error susceptibility and unknown transformation between bit error rates and application error rates in the Cortex-A9 system.…”

Section: A Task Failure Rate Estimationmentioning

confidence: 99%

Self-Adaptation for Availability in CPU-FPGA Systems Under Soft Errors

Mostl

Dorflinger

Albers

et al. 2019

2019 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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We introduce a model-based reliability estimation to preserve application availability in CPU-FPGA systems exposed to soft errors under varying environment conditions. The estimation is used as an in-system method to select a suitable configuration for changing radiation conditions. This allows systems to autonomously adapt their configuration in order to balance between reliability and performance. Such a selfadaptation goes beyond the state-of-the-art, where adaptation relies on preplanned reactive mode changes. By autonomously evaluating new configurations, our self-adaptation process is capable of increasing the availability by selecting the configuration with the desired application reliabilities for the current environment conditions.

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“…Experimental evaluation of SEE in ICs under heavy-ion irradiation can be performed in a handful of facilities around the world [8], [21], [26]. Such experiments provide information regarding the sensitivity of a given circuit against SEE, in working conditions that well reproduce those expected for a system that performs in a space environment, including the possible effects of physical implementations on the ASET response.…”

Section: Analogmentioning

confidence: 99%

Pulse Quenching and Charge-Sharing Effects on Heavy-Ion Microbeam Induced ASET in a Full-Custom CMOS OpAmp

Fontana

Pazos

Aguirre

et al. 2019

IEEE Trans. Nucl. Sci.

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In this work, charge sharing effects on Analog Single Event Transients are experimentally observed in a fully-custom designed, 180nm CMOS Operational Amplifier by means of a heavy-ion microbeam. Sensitive nodes of the differential stage showed bipolar output transients that cannot be explained by single node collection for the closed loop characteristics of the circuit under test. Layout of these transistors are consistent with charge sharing effects due to deposited charge diffusion. Implementation of linear modeling and simulations of multiple node collection between paired transistors of the input stage showed great coincidence with the obtained experimental waveforms, shaped as bipolar, quenched pulses. These effects are also observed due to dummy transistors placed in the layout.A simple parametrization at the simulation level is proposed to reproduce the observed experimental waveforms. Results indicate that charge-sharing effects should be taken into account during simulation-based sensitivity evaluation of analog circuits, as pulse quenching can alter the obtained results, and linear modeling is a simple approach to emulate simultaneous charge collection in multiple nodes by applying superposition principles, with aims of hardening a design.

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Microbeam Heavy-Ion Single-Event Effect on Xilinx 28-nm System on Chip

Cited by 20 publications

References 19 publications

Single event effect evaluation of different communication ways based on 40nm SRAM-FPGA

Single event effect evaluation of different communication ways based on 40nm SRAM-FPGA

Self-Adaptation for Availability in CPU-FPGA Systems Under Soft Errors

Pulse Quenching and Charge-Sharing Effects on Heavy-Ion Microbeam Induced ASET in a Full-Custom CMOS OpAmp

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