Microchannel cooling for the LHCb VELO Upgrade I

Francisco, O.; Akiba, K. Carvalho; Bertella, C.; Bitadze, A.; Brock, Matthew; Bulat, Bartosz; Button, Guillaume; Buytaert, J.; Capua, S. De; Callegari, Riccardo; Castellana, Christine; Catinaccio, A.; Charrier, Catherine; Charvet, Collette; Coco, V.; Collins, P.; Degrange, J.; Dumps, Raphael; Feito, D. Alvarez; Freestone, J.; Jędrychowski, Mariusz; Lima, V. Franco; Gallas, A.; Hulsbergen, W.; Hynds, D.; Izquierdo, G. Arnau; Jałocha, P.; Jans, E.; John, M.; Jurik, N.; Latham, T.; Leflat, A.; Cid, E. Lemos; Lindner, R.; Mapelli, A.; Mathad, A.; Morris, A. G.; Noel, J.P.; Nomerotski, A.; Oliveira, Rui de; Overbeek, Martijn van; Parkes, C.; Petagna, P.; Porret, Alexandre; Renaud, D.; Roeland, Erno; Romagnoli, Giulia; Rouchouze, Eric; Roo, Krista de; Sanders, Freek; Schneider, Thomas; Schindler, H.; Schmidt, B.; Schopper, A.; Scantlebury-Smead, Luke; Stenis, M. van; Švihra, Peter; Teissandier, Benoit; Teissier, J; Thery, Xavier; Thomas, E.; Verlaat, B.; Williams, Mark Richard James

doi:10.1016/j.nima.2022.166874

Cited by 12 publications

(16 citation statements)

References 27 publications

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“…These performance levels must be achieved while respecting the specifications of power consumption posed by cooling and power-delivery systems. This limits translate to a maximum power consumption per unit area (power budget) ranging from 0.1 W/ cm 2 [10] to 1.5 W/ cm 2 [8] [11]. Furthermore, the ASIC architecture and technology must be sufficiently radiation-hard to sustain an total dose in the order of tens of megagrays [8].…”

Section: State Of the Art Of High Time Resolution Asicsmentioning

confidence: 99%

Timespot1: A 28nm CMOS Pixel Read-Out ASIC for 4D Tracking at High Rates

Cadeddu¹,

Frontini²,

Lai³

et al. 2022

Preprint

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A: We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a 32 × 32 pixel matrix with a pitch of 55 µm. Timespot1 is the first-born small-size prototype, conceived to read-out fine-pitch pixels with single-hit time resolution below 50 ps and input rates of several hundreds of kilohertz per pixel. Such experimental conditions will be typical of the next generation of high-luminosity collider experiments, from the LHC run5 and beyond. Each pixel of the ASIC has been endowed with a charge amplifier, a discriminator, and a Time-to-Digital Converter with time resolution around 30 ps and maximum read-out rates (per pixel) of 3 MHz. To respect system-level constraints, the timing performance have been obtained keeping the power budget per pixel below 40 µW. The ASIC has been tested and characterised in laboratory concerning its performance in terms of time resolution, power budget and sustainable rates. The ASIC will be hybridized on a matched 32 × 32 pixel sensor matrix and will be tested under laser beam and Minimum Ionizing Particles in the laboratory and at test beams. In this paper we present a description of the ASIC operation and the first results obtained from characterization tests concerning its performance in tracking measurements.

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Section: State Of the Art Of High Time Resolution Asicsmentioning

confidence: 99%

Timespot1: A 28nm CMOS Pixel Read-Out ASIC for 4D Tracking at High Rates

Cadeddu¹,

Frontini²,

Lai³

et al. 2022

Preprint

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“…To fulfil these requirements, the particle physics community has developed silicon microchannels cooling plates. As of today, such devices have been implemented in two detectors, the NA62 GigaTracKer [6] and the upgraded LHCb-VELO [7]. Their specifications are reported in Table 1.…”

mentioning

confidence: 99%

“…Alternative refrigerants are envisaged such as bi-phase krypton [8], which reaches ~100 bar at room temperature. For both the NA62 and LHCb detectors, the cooling plates were fabricated on 8-inch etched silicon-on-insulator (SOI) wafers, bonded together using either hydrophilic or hydrophobic direct bonding (DB) [6,7]. This fabrication process was reported to be challenging and expensive [7].…”

mentioning

confidence: 99%

“…For both the NA62 and LHCb detectors, the cooling plates were fabricated on 8-inch etched silicon-on-insulator (SOI) wafers, bonded together using either hydrophilic or hydrophobic direct bonding (DB) [6,7]. This fabrication process was reported to be challenging and expensive [7]. The most critical steps were found to be the bonding of large and deeply etched SOI wafers and the soldering of the connectors.…”

mentioning

confidence: 99%

“…Table 1. Specification of the cooling system of the two particle physics detectors implementing Si microchannels cooling [6,7].…”

mentioning

confidence: 99%

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Comparison of Anodic and Au-Au Thermocompression Si-Wafer Bonding Methods for High-pressure Microcooling Devices

Bargiel¹,

Cogan²,

Queste³

et al. 2023

Preprint

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Silicon-based microchannel technology offers unmatched performances for cooling high energy physics silicon-pixels detectors. Although Si-Si direct bonding, used for the fabrication of cooling plates, meets the stringent requirements of this application, in particular high-pressure resistance (~200 bar), it is reported to be a challenging and expensive process. In this work, we have evaluated two alternative bonding methods towards a more cost-effective fabrication process: Si-Glass-Si anodic bonding (AB) with a thin-film glass and Au-Au thermocompression (TC). The bonding strength of the two methods were evaluated with destructive pressure burst tests (0 - 690 bar) on test structures, each made of a 1×2 cm2 silicon die etched with a tank and an inlet channel and sealed with a plain silicon die using AB or TC bonding. The pressure resistance of the structures was measured to be higher for the TC sealed samples (max. 690 bar) than for the AB ones (max. 530 bar) but less reproducible. The failure analysis indicates that the AB structure resistance is limited by the adhesion force of the deposited layers. Nevertheless, both the TC and AB methods provided sufficient bond quality to hold the high pressure required for the high energy physics pixel detectors cooling application.

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Heat transfer enhancement of microchannel using nano-encapsulated phase change material for fuel cell thermal management systems

Xie,

Yang

2024

Journal of Energy Storage

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Microchannel cooling for the LHCb VELO Upgrade I

Cited by 12 publications

References 27 publications

Timespot1: A 28nm CMOS Pixel Read-Out ASIC for 4D Tracking at High Rates

Timespot1: A 28nm CMOS Pixel Read-Out ASIC for 4D Tracking at High Rates

Comparison of Anodic and Au-Au Thermocompression Si-Wafer Bonding Methods for High-pressure Microcooling Devices

Heat transfer enhancement of microchannel using nano-encapsulated phase change material for fuel cell thermal management systems

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