Microelectromechanical Relay and Logic Circuit Design for Zero Crowbar Current

Abstract

A compact microelectromechanical (MEM) switch design and associated family of logic gates, memory cells, and other basic very-large-scale integration (VLSI) digital circuit sub blocks are proposed to ensure zero crowbar current in addition to zero leakage current while minimizing mechanical delay. The circuit design methodology introduced in this paper also provides for lower device count and hence lower operating power consumption. A prototype of the MEM switch design is demonstrated.

NEM relay design for compact, ultra-low-power digital logic circuits

“…To avoid this issue, a 6-terminal (6-T) SPDT relay design (Fig. 7), in which the input electrode is electrically isolated from the output electrode by incorporating an insulating dielectric material between the actuation and contact portions of the movable structure, should be used along with an appropriate circuit design methodology (15).…”

“…10, a single-stage carry-generation and adder circuit suited for a carry-lookahead adder (15) can be realized with only 4 and 8 relays, respectively, by multiplexing AND, OR, XOR and XNOR outputs. It should be noted that, since each of these logic gates are single-stage, their mechanical switching delay does not depend on the number of inputs.…”

“…Fig. 8 (15). a 2 a 2 a 2 a 1 a 1 a 1 a 1 a 1 a 1 a 1 "111" "000" "001" "010" "011" "100" "101" "110" Table I compares the number of switching devices used to implement various logic functions, for CMOS vs. relay technologies.…”

“…Conceptual schematic illustrating a SPDT 6-terminal relay design(15). Note that it incorporates an insulator to electrically isolate the input from the output signal path.…”

Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

“…Several research groups have been or are currently investigating the design and applications of NEM switches for logic applications, including but not limited to [6][7][8][9][10][11][12][13][14][15][16][17][18][19].…”