Middle-Level SHE Pulse-Amplitude Modulation for Cascaded Multilevel Inverters

Kamani, Piyush L.; Mulla, Mahmadasraf A.

doi:10.1109/tie.2017.2742990

Cited by 64 publications

(47 citation statements)

References 15 publications

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“…In literature, several modulation schemes have been proposed for controlling the output voltage waveform quality of multilevel inverters. These can be listed as sinusoidal pulse width modulation (SPWM), space vector modulation, selective harmonic elimination (SHE)‐pulse width modulation (PWM), optimal minimization of THD (OMTHD), optimal PWM (OPWM), and selective harmonic mitigation‐(SHM) PWM . Out of these PWM schemes, SHE‐PWM scheme works on the low‐switching frequency, and it is used to completely eliminate (E‐1) number of specific low‐order harmonics of the output voltage using “E” number of switching instances in each quarter cycle of the output waveform.…”

Section: Introductionmentioning

confidence: 99%

“…Out of these PWM schemes, SHE‐PWM scheme works on the low‐switching frequency, and it is used to completely eliminate (E‐1) number of specific low‐order harmonics of the output voltage using “E” number of switching instances in each quarter cycle of the output waveform. The major drawback of this scheme is that it only eliminates a limited number of low‐order harmonics while other harmonics (which are not incorporated into the problem) are totally uncontrolled and can attain high magnitudes . Hence, for a specific number of output voltage levels, this scheme requires more number of switching instances to fulfill some power quality standards and to remove more number of low‐order harmonics.…”

Section: Introductionmentioning

confidence: 99%

“…But it requires more number of switching instances in a quarter period to fulfill some specific power quality standards. Besides that, uneven power distribution between the H‐bridge cells of CHB inverter can occur in the aforesaid SHE‐PWM and SHM‐PWM schemes . This will affect the rating and size of both semiconductor devices and input side isolation transformers.…”

Section: Introductionmentioning

confidence: 99%

“…The major drawback of this scheme is that it only eliminates a limited number of low-order harmonics while other harmonics (which are not incorporated into the problem) are totally uncontrolled and can attain high magnitudes. [16][17][18][19][20][21][22][23] Hence, for a specific number of output voltage levels, this scheme requires more number of switching instances to fulfill some power quality standards and to remove more number of low-order harmonics. Thus, it results in higher switching losses in power switching devices and reduces the conversion efficiency.…”

mentioning

confidence: 99%

“…Besides that, uneven power distribution between the H-bridge cells of CHB inverter can occur in the aforesaid SHE-PWM and SHM-PWM schemes. [16][17][18][19][20][21][22][23][24][25][26][30][31][32][33][34][35][36] This will affect the rating and size of both semiconductor devices and input side isolation transformers. Ghoreishy et al 37 introduced a modified SHM-PWM scheme for a three-phase five-level CHB inverter where variable DC voltage sources have been included as an additional degree of freedom along with the switching angles.…”

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confidence: 99%

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An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

Kundu

Banerjee

2019

Int Trans Electr Energ Syst

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Summary This paper presents an improved selective harmonic minimization (SHM)‐pulse width modulation (PWM) scheme using three‐phase seven‐level cascaded H‐bridge (CHB) inverter suitable for medium‐voltage distribution systems by achieving high‐quality voltage waveform with least number of switching instances (ie, each power semiconductor devices switched once in a quarter period). Here, each isolated DC voltage sources have been taken as variable and unequal for the CHB inverter. The efficacy of the proposed SHM‐PWM scheme over selective harmonic elimination (SHE)‐PWM scheme and existing SHM‐PWM scheme has been verified through a comparative inverter performance analysis with equal number of switching instances. Both simulation and experimental results prove that the proposed SHM‐PWM scheme ensures equal percentage of power‐sharing between the H‐bridge cells, achieves desired fundamental voltage component, minimizes each individual odd nontriplen harmonics, and limits %total harmonic distortion (THD) up to 25th‐order harmonics such that, it satisfies the power quality standards CIGRE WG 36‐05 and EN 50160 for the entire modulation index range. It is also seen that the proposed scheme requires least no of switching (three) than other reported SHE‐/SHM‐PWM schemes to meet the aforesaid power quality standards. It also results lower inverter losses and improves efficiency compared with conventional schemes. Finally, the scheme is applied to a closed‐loop control of induction motor driven by back‐to‐back PWM‐controlled converter.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

See 3 more Smart Citations

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

Kundu

Banerjee

2019

Int Trans Electr Energ Syst

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Simplified selective harmonic elimination PWM for three‐level five‐phase T‐NPC inverter

Bennacer

Bentafat

Benachour

et al. 2023

Circuit Theory & Apps

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SummaryThis paper presents a selective harmonic PWM strategy (HSE‐PWM) to control a five‐phase three‐level T‐NPC inverter. The proposed method aims to reduce switching losses and directly eliminate specific orders of harmonics, while also controlling the fundamental magnitude. MATLAB/Simulink simulations are conducted using an RL load, and the implementation is tested using a simplified method on an STM32F4 controller board. Experimental tests are then carried out to validate the simulation results. Additionally, power losses and efficiency are studied using Plecs software. The paper explores four different cases of switching angles number and proposes three SHE methods: a simple SHE based on Newton Raphson's method, SHE with current THD optimization, and SHE with common mode voltage (CMV) optimization using the PSO algorithm. The proposed methods provide complete control over the fundamental of the output voltage and the selected harmonics while reducing switching losses. A comparison is carried out in terms of voltage waveform, maximum CMV, fundamental magnitude, total harmonic distortion (THD), and power efficiency for the three methods. The paper concludes that the proposed modulation can be useful in high‐power applications.

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A novel space vector modulation algorithm with narrow pulse suppression and high‐voltage jump suppression for high‐power five‐level NPC/H inverter

Liu

Wang

Liu

2019

IEEJ Transactions Elec Engng

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In the high-power five-level neutral point clamping/H-bridge (NPC/H) inverter, the traditional space vector modulation (SVM) algorithm at a low switching frequency has the disadvantages of a high-voltage jump at high modulation index and an inherent narrow pulse at low modulation index, which may cause serious damage to the power stage. In this paper, a novel SVM algorithm is proposed to suppress the high-voltage jump and narrow pulse for the five-level NPC/H inverter with a high-power integrated gate-commutated thyristor (IGCT). An equivalent three-level NPC model is applied to reduce the redundant switching state. To suppress the high-voltage jump at high modulation index, the switching state optimization method is proposed. Moreover, the zero sequence voltage injection is proposed to suppress the narrow pulse at low modulation index. Finally, the novel SVM algorithm is experimentally tested on an experimental prototype and an engineering prototype for 6.6 kV to 20 MW motor drive system. The simulation and experimental results verify the effectiveness of the proposed SVM algorithm.He Liu (Non-member) He received an M.S. degree in power electronics and power drives from the school of Information and Electrical Engineering, China University of Mining and Technology in 2012 and is presently working toward a Ph.D. inform the School of electronic information and electrical engineering, Shanghai Jiao Tong University. He has worked on multilevel converters.

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Middle-Level SHE Pulse-Amplitude Modulation for Cascaded Multilevel Inverters

Cited by 64 publications

References 15 publications

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

Simplified selective harmonic elimination PWM for three‐level five‐phase T‐NPC inverter

A novel space vector modulation algorithm with narrow pulse suppression and high‐voltage jump suppression for high‐power five‐level NPC/H inverter

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