Miniature programmable transversal filter using CCD/MOS technology

Denyer, P.B.; Mavor, J.; Arthur, J. W.

doi:10.1109/proc.1979.11201

Cited by 38 publications

(9 citation statements)

References 6 publications

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“…Continuous-time transversal equalizers have been explored for high-speed applications, using charge-coupled devices (CCDs) [19] and surface accoustic wave (SAW) filters [20], as well as switch capacitors [21] and -ladder filters [22], [23]. Besides speed, such analog equalization has an additional advantage: Since sampling is done after equalization, signal delay in the equalizer does not affect the performance and stability of the clock-and-data-recovery (CDR) timing loop [24].…”

Section: A Transversal Equalizermentioning

confidence: 99%

Integrated transversal equalizers in high-speed fiber-optic systems

Tierno

Pepeljugoski

et al. 2003

IEEE J. Solid-State Circuits

125

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Abstract-Intersymbol interference (ISI) caused by intermodal dispersion in multimode fibers is the major limiting factor in the achievable data rate or transmission distance in high-speed multimode fiber-optic links for local area networks applications. Compared with optical-domain and other electrical-domain dispersion compensation methods, equalization with transversal filters based on distributed circuit techniques presents a cost-effective and lowpower solution. The design of integrated distributed transversal equalizers is described in detail with focus on delay lines and gain stages. This seven-tap distributed transversal equalizer prototype has been implemented in a commercial 0.18-m SiGe BiCMOS process for 10-Gb/s multimode fiber-optic links. A seven-tap distributed transversal equalizer reduces the ISI of a 10-Gb/s signal after 800 m of 50-m multimode fiber from 5 to 1.38 dB, and improves the bit-error rate from about 10 5 to less than 10 12 .

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Section: A Transversal Equalizermentioning

confidence: 99%

Integrated transversal equalizers in high-speed fiber-optic systems

Tierno

Pepeljugoski

et al. 2003

IEEE J. Solid-State Circuits

125

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“…This part or fraction is controlled or programmed by voltage. The advantage of capacitive weighting is the low power dissipation and smaller chip area compared to the structures where a combination of a floating sense gate and a buffer circuit performs a charge-to-voltage conversion and variable TAP weighting is obtained by means of an MOS transistor acting as an analog multiplier [7], [12] or variable conductance MOST devices [8] . In the varicap-based implementations realized thus far, the sensed charge was only 10 percent of the signal charge in a CCD and, therefore, the insertion loss was high [SI .…”

Section: A B Bhattacharyya and Hans W A L L I N G Amentioning

confidence: 99%

An area-variable MOS varicap and its application in programmable TAP weighting of CCD transversal filters

Bhattacharyya¹,

Wallinga

1982

IEEE Trans. Electron Devices

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T. i , , and J(n) are functions of position, 0 < X < L . The coefficients J(m) are derivatives of the intrinsic 'diode characteristic at Y = V, (8). REFERENCES[ 11 M. Wolf, "Limitations and possibilities for improvement of photovoltaic solar energy converters,"Proc. IRE, vol. 48, p. 1246IRE, vol. 48, p. , 1960 [ 21 J. J. Wysocki, "The effect of series resistance on photovoltaic solar energy conversion," RCA Rev., vol. 22, p. 57, 1961. [3] R. J. Handy, "Theoretical analysis of the series resistance of a solar cell," Solid-State Electron., vol. 10, p. 765, 1967. [4] J. L. Boone and T. P. Van Doren, "Solar-cell design based on a distributed diode analysis," IEEE Trans. Electron Devices, vol. ED-25, p. 767, 1978 A. B. BHATTACHARYYA AND HANS W A L L I N G AAbstract-A new three-terminal MOS varicap is proposed where the terminal capacitors are made voltage variable not by the modulation of depletion width but by changing the area of inversion under the gate. An MOS capacitor realized on silicon with an impurity gradient along the surface provides the control on the area of inversion because the gate threshold voltage is determined by the doping concentration at the surface.The inhomogeneous doping along the surface is implemented making use of the lateral diffusion from a doped oxide surface. Fabrication details of the capacitor compatible with n-channel silicon gate technology are presented. The C-V relationship for the terminal capacitors is simulated by a piecewise model and agreement with measured results is shown.The Area-Variable MOS Varicap (AVMOSV) is used in implementing an electrically programmable CCD filter with variable TAP weighting. Computer simulation shows considerable promise of area-variable capacitors in TAP weight control and transversal filter realization. Preliminary performance characteristics of a programmable CCD filter are presented.

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“…Furthermore , the progranvnabie transversal f il t e r described in (49 ] uses , in fact , analog multipliers at each tap . These multipliers are implemented by means of an MOs transistor operating in the linear region of the 1 DS versus V DS characteristic, and does not appear to offer a high degree of accuracy .…”

Section: Estimation Of the Total Affine Parameter Vector A 62 1 Estmentioning

confidence: 99%

“…As can be observed by inspection of Figures 12 to 19, the use of C~~'s and AM's makes it possible to implement the system without resorting to continuously programmable transversal filters. The inclusion of AM 's Ofl chip will probably guarantee a higher degree of accuracy than the use of programmable transversal filters such as those described in (49]. A block diagram of the complete system is given in Pig.…”

Section: R2imentioning

confidence: 99%