Charge-coupled device (CCD) technology is the traditional route to realization of high-end consumer-level color imaging products. Device count and complexity militate against the price/performance breakthrough necessary to bring cameras for videoconferencing, digital stills and movie photography to the mass-market. Recently, a technological alternative to CCD in the form of cameras using sensors built from standard CMOS processes has appeared, and we report here a further milestone. A single-chip NTSC video camera can be partitioned into analog (custom) and digital (cell-based) sections ( Figure 1) [1,21.Thesensingheart ofthedeviceisanarrayof306~244photosensitive elements, each comprising a 3 transistor active pixel based on a standard CMOS n +/ p-well photodiode ( Figure 2). Photocharge integrated in the pixel during exposure is read row-sequentially into a column structure that removes the systematic offset of each pixel by a read sequence with correlated double sampling. The row of corrected values is then read pixel-sequentially, synchronous to the color processing engine through a programmable gain amplifier to a samplehold stage that drives an onboard 8b half-flash sub-ranging ADC. The resulting digital video stream is sent to the color processing engine, that returns an NTSC encoded data stream for conversion to analog by a currentsteering DAC driving 1V composite video into a 37.5Q load. Alternating progressive-scan field exposures comply with 525line 29.97Hz NTSC frame timing [31.The device contains all voltage references and analog signal buffers needed t o render the final device autonomous. I t requires only a few decoupling capacitors and terminating resistors in addition to a single crystal (Figure 3). To this end, two control loops utilize statistics gathered in the digital section of the device to maintain optimal analog operation. Auto black calibration (ABC) monitors nominal black lines in the image, using a small DAC to calibrate out offsets and center the black level at the bottom of the ADC range. Automatic exposure control (AEC) determines both charge integration time and gain. The exposure of a non-shuttered CMOS sensor can be considered as a rolling window of a certain number of lines, represented by a pulse traversing the vertical shift register. It is also possible to use line section to give a finer exposure step, resulting in a potential exposure range from one field (16.7ms) to one pixel (140ns), a range of almost 120,OOO:l. 18dB of digitally-selectable analog gain is also available.Aside from the sensor control logic described above, the digital section comprises two essentially independent signal-processing modules that process data at 14.32MHz in dataflow architecture to achieve a throughput of over 300M integer operationsk (8b add equivalent). Arithmetic is performed in serial-parallel carry-ripple pipelines, with embedded lookup of non-linear functions [4]. Five line memories are included for vertical filtering.The color reconstruction processor recovers 24b RGB data from Bayer-p...

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This paper compares the relative advantages of discrete and integrated circuit transversal and lattice adaptive filter designs.It discusses the tradeoffs between the traditional transversal filter and the gradient adaptive lattice (GAL), showing that the reliable rate of convergence of the lattice is offset by a greater complexity and algorithm noise.Two 16-stage hardware implementations are described. One is a TTL GAL equaliser based on a single 12-bit parallel multiplier.The second is a suite of 5 custom NMOS bit-serial arithmetic LSI chips, which together make a lattice prediction-error filter.Both implementations offer 12-bit precisions and bandwidths of over 8 kHz.This shows that the increased complexity of the lattice approach can easily be accommodated in custom VLSI circuit designs.

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