Minimising Impact of Wire Resistance in Low-Power Crossbar Array Write Scheme

Brain‐inspired neuromorphic computing is a new paradigm that holds great potential to overcome the intrinsic energy and speed issues of traditional von Neumann based computing architecture. With the ability to perform vector‐matrix multiplications and flexible tunable conductance, the memristor crossbar array (CBA) structure is one of the most promising candidates to realize neural cognitive systems. The boom in the development of memristive synapses and neurons has propelled the developments of artificial neural networks (ANNs) to emulate the highly hierarchically organized network of human brain in the past decade. To achieve this, realizing large scale, high‐density memristive CBAs is a prerequisite to constructing complex ANNs. Herein, the stringent requirements in device performance and array parameters for hardware ANNs are analyzed, and the efforts in addressing the associated challenges are discussed. Recent progress on the experimental demonstration of neuromorphic computing systems (NCSs) is presented. Recommendations for further performance optimization at the device, circuit, and algorithm levels are proposed. This Report serves as a guide for the hardware implementation of NCS based on large‐scale CBAs.

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“…[43] In addition, optimizing the programming scheme and peripheral circuits may also mitigate the influence of wire resistance. [42,204,205]…”

Section: Wire Resistancementioning

confidence: 99%

“…[ 41 ] In addition, sneak current and wire resistance issues cannot be ignored and must be addressed in large‐scale and high‐density memristor CBAs. [ 42,43 ] Addressing these challenges is critical to the realization of hardware NCSs.…”

Section: Introductionmentioning

confidence: 99%

Hardware Implementation of Neuromorphic Computing Using Large‐Scale Memristor Crossbar Arrays

Ang

2020

Advanced Intelligent Systems

138

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“…Hence, robust process variation aware sensors, capable of detecting harmful chemicals, are fundamental to preserving life [22]. Additionally, with smaller technology nodes the effects of nanowire resistance are more noticeable [23,24]. Cumulative wire resistance can also affect performance of systems, e.g.…”

Section: Introductionmentioning

confidence: 99%

Low power memristive gas sensor architectures with improved sensing accuracy

et al. 2022

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Memristive devices, traditionally considered for memory, logic, and neuromorphic systems, are exhibiting many interesting properties for applications in a variety of areas, such as in sensing chemicals. However, any realistic approach based on these devices must take into account their susceptibility to process and parametric variations. When used for sensing purposes this, together with wire resistance, can significantly degrade their sensing accuracy. To this end, we propose novel memristive gas sensor architectures that can significantly reduce these effects in a predictable manner, while improving accuracy and overall power consumption. Additionally, we show that in the absence of gasses this architecture can also be configured to realize multifunction logic operations as well as Complementary Resistive Switch with low hardware overhead, thereby enhancing resource reusability. We also present a method for further improving power consumption and measurability by manipulating a device’s internal barrier. Our results show that the proposed architecture is significantly immune to process and parametric variations compared to a single sensor and almost unaffected by wire resistance, while offering much higher accuracy and much lower power consumption compared to existing techniques.

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“…In a memristor crossbar array, some amount of voltage drop can be caused by parasitic resistance, also known as wire resistance along the row and the column lines [19,[24][25][26][27][28]. Hereinafter "wire resistance" and "parasitic resistance" are used interchangeably.…”

Section: Introductionmentioning

confidence: 99%

“…The impact of wire resistance becomes inevitable when the array size increases [22]. To mitigate the impact of wire resistance, several interesting schemes were proposed [25][26][27][28]. A design methodology has been proposed to reduce the impact of wire resistance in a one-selector-one resistive device (1S1R) crossbar array [27].…”

Section: Introductionmentioning

confidence: 99%

A Parasitic Resistance-Adapted Programming Scheme for Memristor Crossbar-Based Neuromorphic Computing Systems

Truong

2019

Materials

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Memristor crossbar arrays without selector devices, such as complementary-metal oxide semiconductor (CMOS) devices, are a potential for realizing neuromorphic computing systems. However, wire resistance of metal wires is one of the factors that degrade the performance of memristor crossbar circuits. In this work, we propose a wire resistance modeling method and a parasitic resistance-adapted programming scheme to reduce the impact of wire resistance in a memristor crossbar-based neuromorphic computing system. The equivalent wire resistances for the cells are estimated by analyzing the crossbar circuit using the superposition theorem. For the conventional programming scheme, the connection matrix composed of the target memristance values is used for crossbar array programming. In the proposed parasitic resistance-adapted programming scheme, the connection matrix is updated before it is used for crossbar array programming to compensate the equivalent wire resistance. The updated connection matrix is obtained by subtracting the equivalent connection matrix from the original connection matrix. The circuit simulations are performed to test the proposed wire resistance modeling method and the parasitic resistance-adapted programming scheme. The simulation results showed that the discrepancy of the output voltages of the crossbar between the conventional wire resistance modeling method and the proposed wire resistance modeling method is as low as 2.9% when wire resistance varied from 0.5 to 3.0 Ω. The recognition rate of the memristor crossbar with the conventional programming scheme is 99%, 95%, 81%, and 65% when wire resistance is set to be 1.5, 2.0, 2.5, and 3.0 Ω, respectively. By contrast, the memristor crossbar with the proposed parasitic resistance-adapted programming scheme can maintain the recognition as high as 100% when wire resistance is as high as 3.0 Ω.

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Minimising Impact of Wire Resistance in Low-Power Crossbar Array Write Scheme

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Cited by 8 publications

References 21 publications

Hardware Implementation of Neuromorphic Computing Using Large‐Scale Memristor Crossbar Arrays

Hardware Implementation of Neuromorphic Computing Using Large‐Scale Memristor Crossbar Arrays

Low power memristive gas sensor architectures with improved sensing accuracy

A Parasitic Resistance-Adapted Programming Scheme for Memristor Crossbar-Based Neuromorphic Computing Systems

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